PCI9030-AA60BI PLX Technology, PCI9030-AA60BI Datasheet - Page 109

• Manufacturer Part Number: PCI9030-AA60BI
• Description: Peripheral Drivers & Components (PCIs) 32-bit 33MHz PCI v.2.2-compliant
• Manufacturer: PLX Technology

Specifications of PCI9030-AA60BI

• Package / Case: FPBGA-180
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Lead Free Status / Rohs Status: No RoHS Version Available

8
The PCI 9030 is compliant with PICMG 2.1, R2.0
requirements for Hot Swap silicon, including support
for Programming Interface 0 (PI = 0), Precharge Bias
Voltage, and Early Power.
8.1
Hot Swap is used for many CompactPCI applications.
Hot Swap functionality allows the orderly insertion and
removal of boards without adversely affecting system
operation. This is done for repair of faulty boards or
system
provides access to Hot Swap services, allowing
system reconfiguration and fault recovery to occur with
no system down time and minimum operator
interaction. Adapter insertion/removal logic control
resides on the individual adapters. The PCI 9030 uses
four
LEDon#—to implement the hardware aspects of Hot
Swap functionality. The PCI 9030 uses the Hot Swap
Capabilities register to implement the software
aspects of Hot Swap.
The
specified in the PICMG 2.1, R2.0 requirements for Hot
Swap Silicon:
• PICMG 2.1, R2.0 compliance
• Tolerate V
• Tolerate asynchronous reset
• Tolerate precharge bias voltage
• I/O Buffers must meet modified V/I requirements
• Limited I/O pin leakage at precharge bias voltage
• Incorporates Hot Swap Control/Status register
• Incorporates an Extended Capability Pointer
• Incorporates remaining software connection control
• Early Power Support.
PCI 9030 Data Book Version 1.4
© 2002 PLX Technology, Inc. All rights reserved.
(HS_CSR)—Contained within the configuration
space.
(ECP) mechanism—It is required that Software
retain a standard method of determining whether
a specific function is designed in accordance
with PICMG 2.1, R2.0. The Capabilities Pointer
is located within standard CSR space, in the
New Capability Functions Support bit (PCISR[4]).
resources. Provides ENUM#, Hot Swap switch, and
the blue LED.
PCI 9030
pins—BD_SEL#,
COMPACTPCI HOT SWAP
OVERVIEW
reconfiguration.
CC
from early power
supports
CPCISW,
Additionally,
the
following
ENUM#
Hot
features
Swap
and
• Incorporates a 1V precharge bias voltage to the
8.2
The following sections are excerpts from PICMG 2.1,
R2.0. Refer to this specification for more details.
8.2.1
Hardware Control provides a means for the platform
to control the hardware connection process. The
signals listed in the following sections must be
supported on all Hot Swap boards for interoperability.
Implementations on different platforms may vary.
8.2.1.1
BD_SEL#, one of the shortest pins from the
CompactPCI backplane, is driven low to enable
power-on. For systems not implementing hardware
control, it is grounded on the backplane.
Systems implementing hardware control radially
connect BD_SEL# to a Hot Swap Controller (HSC).
The controller terminates the signal with a weak
pull-down, and can detect board present when the
board pull-up overrides the pull-down. HSC can then
control the power-on process by driving BD_SEL# low.
The PCI 9030 uses the BD_SEL# signal to three-state
all local output buffers during the insertion and
extraction process. In addition, the PCI 9030 uses
BD_SEL# as a qualifier to dynamically connect 1V and
V
buffers. A pull-up resistor must be provided to the
BD_SEL# pin or add-in card, where the pull-up resistor
is connected to an Early Power power supply, which
provides for proper PCI 9030 operation. (Refer to
Section
connections.)
I/O
PCI I/O pins—All PCI Bus signals are required to
be precharged to a 1V bias through a 10K-Ohm
resistor during the Hot Swap process. The
PCI 9030 provides an internal voltage regulator to
supply 1V, with a built-in 10K-Ohm resistor, to all
required PCI I/O buffers. Other PCI signals can be
precharged to V
precharge bias resistors to all required PCI I/O
CONTROLLING CONNECTION
PROCESSES
Connection Control
11,
Board Slot Control
“Pin
IO
.
Description,”
for
precharge
8-1