PCI9030-AA60BI PLX Technology, PCI9030-AA60BI Datasheet - Page 127

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PCI9030-AA60BI

Manufacturer Part Number
PCI9030-AA60BI
Description
Peripheral Drivers & Components (PCIs) 32-bit 33MHz PCI v.2.2-compliant
Manufacturer
PLX Technology
Datasheets

Specifications of PCI9030-AA60BI

Package / Case
FPBGA-180
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Lead Free Status / Rohs Status
No RoHS Version Available

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PCI Configuration Registers
Register 10-28. (PMCSR; PCI:44h) Power Management Control/Status
Register 10-29. (PMCSR_BSE; PCI:46h) PMCSR Bridge Support Extensions
PCI 9030 Data Book Version 1.4
© 2002 PLX Technology, Inc. All rights reserved.
14:13
12:9
Bit
Bit
1:0
7:2
7:0
15
8
Power State. Determines or changes the current power state.
Values:
00 = D 0
11 = D 3hot
Transition from a D 3hot state to a D 0 state causes a soft reset,
LRESETo# assertion, an LPMINT# pulse, clearing of Local
Configuration registers (including the Chip Select and Control
registers), and reloading of the Configuration registers from the
serial EEPROM. In a D 3hot state, PCI Memory and I/O accesses
are disabled, as well as PCI interrupts, and only configuration is
allowed.
Reserved.
PME_En. Writing 1 enables PME# to be asserted.
Data_Select. Selects which data to report through the Data
register and Data_Scale bits.
Data_Scale. Indicates the scaling factor to use when interpreting
the Data register value. Value and meaning of this bit depends on
the data value selected by the Data_Select bit. When the Local
CPU initializes the Data_Scale values, it must use the Data_Select
bit to determine which Data_Scale value it is writing.
For Power Consumed and Power Dissipated data, the following
scale factors are used. Unit values are in watts. Values:
0 = Unknown
1 = 0.1x
2 = 0.01x
3 = 0.001x
Note:
in Section 7.2.1.
PME_Status. Indicates PME# is being driven if the PME_En bit
is set (PMCSR[8]=1). Asserting LPMESET input high sets this bit;
writing 1 from the PCI Bus clears this bit to 0. Depending on the
current power state, set only if the appropriate PME_Support bit(s)
is set (for example, PMC[15:11]=1).
Reserved.
Information regarding hidden register use is provided
Description
Description
Read
Yes
Yes
Yes
Yes
Yes
Yes
Read
Yes
Local Interrupt/Set,
PMDATASCALE
Serial EEPROM
Serial EEPROM
Serial EEPROM
by way of
PCI/Clr
Write
Yes/
Yes/
Yes
No
Write
No
Value after
Value after
Section 10
Reset
Reset
Registers
00
0h
0h
00
0h
0
0
10-13

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