PCI9030-AA60BI PLX Technology, PCI9030-AA60BI Datasheet - Page 110

• Manufacturer Part Number: PCI9030-AA60BI
• Description: Peripheral Drivers & Components (PCIs) 32-bit 33MHz PCI v.2.2-compliant
• Manufacturer: PLX Technology

Specifications of PCI9030-AA60BI

• Package / Case: FPBGA-180
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Lead Free Status / Rohs Status: No RoHS Version Available

Section 8
CompactPCI Hot Swap
Figure 8-1. Redirection of BD_SEL#
8.2.1.2
A second radial signal is used to acknowledge board
health. It signals that a board is suitable to be released
from reset and allowed onto the PCI Bus.
Minimally, this signal must be connected to the board’s
power controller “power good” status line. Use of
HEALTHY#
requiring additional conditions to be met for the board
to be considered healthy.
On platforms that do not use Hardware Connection
Control,
implementing this signaling, route these signals
radially to a Hot Swap Controller.
Figure 8-2. Board Healthy
8.2.1.3
Reset (PCI_RST#), as defined by PICMG 2.1, R2.0, is
a bus signal on the backplane, driven by the Host.
Platforms may implement this signal as a radial signal
from the Hot Swap Controller to further control the
electrical connection process. Platforms that maintain
function of the bus signal must OR the Host reset
signal with the slot-specific signal.
Locally, boards must not exit reset until the H1 State is
reached (healthy), and they must honor the backplane
reset. The Local board reset (Local_PCI_RST#) must
be
Local_PCI_RST# is connected to the PCI 9030 RST#
input pin.
8-2
BD_SEL#
Platform | Board
NC
Platform | Board
No Hardware Control
No Hardware Control
the
ON
this
logical
VIO
Board Healthy
Platform Reset
Circuitry
Power
can
Circuitry
Power
line
OR
be
PRESENT
PWR ON
is
HEALTHY
HSC
expanded
HSC
of
not
these
monitored.
BD_SEL#
Hardware Control
Hardware Control
VIO
Platform | Board
for
two
Platform | Board
HLTY
applications
ON
conditions.
VIO
Platforms
Circuitry
Circuitry
Power
Power
During a precharge bias voltage and platform reset, in
insertion and extraction procedures, all PCI I/O buffers
must be in a high-impedance state. The PCI 9030
supports this condition when the Host RST# is
asserted. To protect the Local board components from
Early Power, the PCI 9030 floats the Local Bus I/Os.
The
high-impedance condition on the Local Bus. With full
contact of the add-in card to the backplane, BD_SEL#
is asserted, which ensures that the PCI 9030 asserts
the LRESETo# signal to complete a Local board reset
task.
Figure 8-3. PCI Reset
8.2.2
Software Connection Control provides a means to
control the Software Connection Process. Hot Swap
board
Control. Access to these resources occurs by way of
the bus, using PCI protocol transfers (in-band).
These resources consist of four elements:
• ENUM# driven active indicates the need to change
• A switch, tied to the ejector, indicates the intent
• LED indicates the software connection process
• Control/Status register allows the software
8.2.2.1
A microswitch (switch), located in the Hot Swap
CompactPCI board card-ejector mechanism, is used
to signal impending board removal. This signal asserts
ENUM#. When the switch is activated, it is necessary
to wait for the LED to turn on, indicating it is now okay
to remove the board. The PCI 9030 implements
separate control logic for the microswitch and blue
No Hardware Control
HOST
the Hot Swap Board state
to remove a board
status
to interact with these resources
PCI_RST#
BD_SEL#
resources
Platform | Board
Software Connection Control
© 2002 PLX Technology, Inc. All rights reserved.
LOCAL_PCI_RST#
Ejector Switch and Blue LED
HEALTHY#
pin
Controlling Connection Processes
facilitate
is
Hardware Connection Control
PCI 9030 Data Book Version 1.4
HOST
HSC
used
software
Platform | Board
PCI_RST#
to
perform
HEALTHY#
Connection
LOCAL_PCI_RST#
the