PCI9030-AA60BI PLX Technology, PCI9030-AA60BI Datasheet - Page 14

• Manufacturer Part Number: PCI9030-AA60BI
• Description: Peripheral Drivers & Components (PCIs) 32-bit 33MHz PCI v.2.2-compliant
• Manufacturer: PLX Technology

Specifications of PCI9030-AA60BI

• Package / Case: FPBGA-180
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Lead Free Status / Rohs Status: No RoHS Version Available

Registers
xiv
10-43 (LAS0BA; 14h) Local Address Space 0 Local Base Address (Remap) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-19
10-44 (LAS1BA; 18h) Local Address Space 1 Local Base Address (Remap) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-19
10-45 (LAS2BA; 1Ch) Local Address Space 2 Local Base Address (Remap) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-20
10-46 (LAS3BA; 20h) Local Address Space 3 Local Base Address (Remap) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-20
10-47 (EROMBA; 24h) Expansion ROM Local Base Address (Remap) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-20
10-48 (LAS0BRD; 28h) Local Address Space 0 Bus Region Descriptor
10-49 (LAS1BRD; 2Ch) Local Address Space 1 Bus Region Descriptor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-23
10-50 (LAS2BRD; 30h) Local Address Space 2 Bus Region Descriptor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-25
10-51 (LAS3BRD; 34h) Local Address Space 3 Bus Region Descriptor
10-52 (EROMBRD; 38h) Expansion ROM Bus Region Descriptor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-29
10-53 (CS0BASE; 3Ch) Chip Select 0 Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-31
10-54 (CS1BASE; 40h) Chip Select 1 Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-31
10-55 (CS2BASE; 44h) Chip Select 2 Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-32
10-56 (CS3BASE; 48h) Chip Select 3 Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-32
10-57 (INTCSR; 4Ch) Interrupt Control/Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-33
10-58 (PROT_AREA; 4Eh) Serial EEPROM Write-Protected Address Boundary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-33
10-59 (CNTRL; 50h) PCI Target Response, Serial EEPROM, and Initialization Control
10-60 (GPIOC; 54h) General Purpose I/O Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-36
10-61 (PMDATASEL; 70h) Hidden 1 Power Management Data Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-37
10-62 (PMDATASCALE; 74h) Hidden 2 Power Management Data Scale. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-37
© 2002 PLX Technology, Inc. All rights reserved.
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PCI 9030 Data Book Version 1.4