PCI9030-AA60BI PLX Technology, PCI9030-AA60BI Datasheet - Page 133

• Manufacturer Part Number: PCI9030-AA60BI
• Description: Peripheral Drivers & Components (PCIs) 32-bit 33MHz PCI v.2.2-compliant
• Manufacturer: PLX Technology

Specifications of PCI9030-AA60BI

• Package / Case: FPBGA-180
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Lead Free Status / Rohs Status: No RoHS Version Available

Local Configuration Registers
Register 10-43. (LAS0BA; 14h) Local Address Space 0 Local Base Address (Remap)
Register 10-44. (LAS1BA; 18h) Local Address Space 1 Local Base Address (Remap)
PCI 9030 Data Book Version 1.4
© 2002 PLX Technology, Inc. All rights reserved.
31:28
31:28
27:4
27:4
Bit
Bit
3:2
3:2
0
1
0
1
Space 0 Enable. Writing 1 enables decoding of PCI addresses for PCI Target
access to Local Address Space 0. Writing 0 disables decoding.
Reserved.
If Local Address Space 0 is mapped into Memory space, bits are not used.
When mapped into I/O space, included with bits [27:4] for remapping.
Remap PCIBAR2 Base Address to Local Address Space 0 Base Address.
The PCIBAR2 base address translates to the Local Address Space 0 Base
Address programmed in this register. A PCI Target access to an offset from
PCIBAR2 maps to the same offset from this Local Base Address.
Notes: Remap Address value must be a Range multiple (not the Range
register).
Reserved. (Local Address bits [31:28] do not exist in the PCI 9030.)
Space 1 Enable. Writing 1 enables decoding of PCI addresses for PCI Target
access to Local Address Space 1. Writing 0 disables decoding. PCIBAR3 can
be enabled or disabled by setting or clearing this bit.
Reserved.
If Local Address Space 1 is mapped into Memory space, bits are not used.
When mapped into I/O space, included with bits [27:4] for remapping.
Remap PCIBAR3 Base Address to Local Address Space 1 Base Address.
The PCIBAR3 base address translates to the Local Address Space 1 Base
Address programmed in this register. A PCI Target access to an offset from
PCIBAR3 maps to the same offset from this Local Base Address.
Note:
Reserved. (Local Address bits [31:28] do not exist in the PCI 9030.)
Remap Address value must be a Range multiple (not the Range register).
Description
Description
Read
Read
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Write
Write
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
Value after
Value after
Reset
Section 10
Reset
Registers
00
0h
0h
00
0h
0h
0
0
1
0
10-19