PCI9030-AA60BI PLX Technology, PCI9030-AA60BI Datasheet - Page 40

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PCI9030-AA60BI

Manufacturer Part Number
PCI9030-AA60BI
Description
Peripheral Drivers & Components (PCIs) 32-bit 33MHz PCI v.2.2-compliant
Manufacturer
PLX Technology
Datasheets

Specifications of PCI9030-AA60BI

Package / Case
FPBGA-180
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Lead Free Status / Rohs Status
No RoHS Version Available

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Section 3
Serial EEPROM Reset and Initialization
Table 3-1. Serial EEPROM Guidelines
3.3.1
The serial EEPROM load sequence, listed in Table
3-2, uses the following abbreviations:
• MSW = Most Significant Word bits [31:16]
• LSW = Least Significant Word bits [15:0]
3.3.1.1
The registers listed in Table 3-2 are loaded from the
serial EEPROM after a PCI reset is de-asserted. The
serial EEPROM is organized in words (16 bit). The
PCI 9030 first loads the Most Significant Word bits
(MSW[31:16]), starting from the most significant bit
([31]). The PCI 9030 then loads the Least Significant
Word bits (LSW[15:0]), starting again from the most
significant bit ([15]). Therefore, the PCI 9030 loads the
Device ID, Vendor ID, Class Code, and so forth.
The serial EEPROM values can be programmed using
a serial EEPROM programmer or PLXMon™ software.
The values can be programmed using the PCI 9030
VPD function (refer to Section 9) or through the Serial
EEPROM Control register (CNTRL).
The CNTRL register allows programming of the serial
EEPROM, one bit at a time. To read back the value
from the serial EEPROM, the Vital Product Data (VPD)
function can be utilized. With full utilization of VPD, the
designer can perform reads and writes from/to the
serial EEPROM, 32 bits at a time. Values should be
programmed in the order listed in Table 3-2. The 68,
16-bit words listed in the table are stored sequentially
in the serial EEPROM.
3-2
Programmed
EEPROM
Serial
Blank
None
Serial EEPROM Load Sequence
Serial EEPROM Load
Uses default values (Start bit is 1).
Boots with serial EEPROM values
(Start bit is 0).
Detects a blank device and reverts
to default values (Start bit is 0).
System Boot Condition
PCI 9030
3.3.1.2
The PCI 9030 is designed to use serial EEPROMs
with a three-wire serial interface, powered at 3.3V, and
that support 250 kHz clocking and sequential reads.
For specific EEPROM recommendations, refer to the
EEPROM Guidelines posted on the PLX website,
http://www.plxtech.com/products/default.htm.
Figure 3-1. Serial EEPROM Memory Map
# of bits
© 2002 PLX Technology, Inc. All rights reserved.
Recommended Serial EEPROMs
4096
2048
1536
1088
0
Load Data
Empty
VPD
PCI 9030 Data Book Version 1.4
100h
80h
60h (PROT_AREA
register default)
44h
0
# of words
(16-bit data)
Serial EEPROM

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