TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 119

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

Match with
TA0REG and UC0
(Interrupt INTTA0)
TA0REG-WR
(4) 8-bit PWM (Pulse width modulation) output mode
TA1OUT
overflow
Figure 3.7.17 shows a block diagram representing this mode.
TA0IN
φT16
resolution of 8 bits can be output.
used as PC1). TMRA1 can also be used as an 8-bit timer.
the timer register TA0REG or when 2
specified by TA01MOD<PWM01:00>). The up counter UC0 is cleared when 2
overflow occurs.
φT1
φT4
2
This mode is only valid for TMRA0. In this mode, a PWM pulse with the maximum
When TMRA0 is used the PWM pulse is output on the TA1OUT pin (which is also
The timer output is inverted when the up counter (UC0) matches the value set in
The following conditions must be satisfied before this PWM mode can be used.
Value set in TA0REG < Value of set for 2
Value set in TA0REG ≠ 0
n
TA01MOD<TA0CLK1:0>
TA01RUN<TA0RDE>
Figure 3.7.17 Block Diagram of 8-Bit PWM Output Mode
Selector
Selector
Figure 3.7.16 8-Bit Output Wave Form
Shift trigger
Internal data bus
8-bit up counter
Register buffer
Comparator
TA0REG
92CM22-117
(UC0)
n
Clear
2
(PWM cycle)
TA01RUN<TA0RUN>
counter overflow occurs (n = 6, 7, or 8 as
n
control
n
overflow
counter overflow
t
PWM
Overflow
TA01MOD
<PWM01:00>
TA1OUT
TA1FF
TMP92CM22
Inversion
2007-02-16
n
INTTA0
counter
TA1FFCR
<TA1FFIE>