TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 168

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TMP92xy22FG

Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy22FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
(4) Mode 3 (9-bit UART mode)
Wakeup function
Note:
TXD
bit cannot be added.
the case of receiving it is stored in SC0CR<RB8>. When the buffer is written and read,
the MSB is read or written first, before the rest of the SC0BUF data.
SC0MOD0<WU> to 1. The interrupt INTRX0 occurs only when <RB8> = 1.
Master
9-bit UART mode is selected by setting SC0MOD0<SM1:0> to 11. In this mode parity
In the case of transmission the MSB (9th bit) is programmed to SC0MOD0<TB8>. In
In 9-bit UART mode, the wakeup function for slave controllers is enabled by setting
The TXD pin of each slave controller must be in open-drain output mode.
RXD
Figure 3.9.23 Serial Link Using Wakeup Function
TXD
Slave 1
92CM22-166
RXD
TXD
Slave 2
RXD
TXD
Slave 3
RXD
TMP92CM22
2007-02-16

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