TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 94

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

B2REC Sets the dummy cycle for data output recovery time.
B2OM[1:0]
B2BUS[1:0] Sets the data bus width.
Note: The value of B2BUS bit is set according to the state of AM[1:0] pin after reset release.
BnE Enable bit.
Note: After reset release, only the enable bit B2E of B2CSH register is valid (“1”).
BnREC Sets the dummy cycle for data output recovery time.
BnOM[1:0]
BnBUS[1:0] Sets the data bus width.
Bit symbol
Read/Write
After reset
0 = Not insert a dummy cycle (Default)
1 = Insert a dummy cycle
00 = SRAM or ROM (Default)
Others = (Reserved)
00 = 8 bits (Default)
01 = 16 bits
10 = (Reserved)
11 = (Reserved)
0 = No chip select signal output (Default)
1 = Chip select signal output
0 = Not insert a dummy cycle (Default)
1 = Insert a dummy cycle
00 = SRAM or ROM (Default)
01 = (Reserved)
10 = (Reserved)
11 = (Reserved)
00 = 8 bits (Default)
01 = 16 bits
10 = (Reserved)
11 = (Reserved)
BnE
W
7
0
6
BnCSH (n = 0, 1, 3)
92CM22-92
5
BnREC
4
0
BnOM1
3
0
BnOM0
W
2
0
BnBUS1
1
0
TMP92CM22
2007-02-16
BnBUS0
0
0