TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 55

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

(0007H)
(0006H)
(0004H)
P1FC
P1CR
P1
Note 1: Read-modify-write instruction is prohibited for registers
Note 2: <P1XC> shows “X bit” of P1CR register.
Note 3: It is set to “Port” or “Data bus” by AM pin setting.
Bit symbol
Read/Write
After reset
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
P1FC and P1CR.
P17C
P17
7
7
7
0
P16C
P16
6
6
6
0
Data from external port (Output latch register is clear to “0”.)
Figure 3.5.2 Register for Port 1
Port 1 Function Register
Port 1 Control Register
P15C
P15
5
5
5
0
Port 1 Register
92CM22-53
Refer to port 1 function setting
Refer to port 1 function setting
P14C
P14
4
4
4
0
R/W
W
P1CR<P1xC>
P13C
P13
3
3
3
0
Port 1 Function setting
P1FC<P1F>
0
1
P12C
P12
2
2
2
0
Output port
Input port
P11C
P11
0
1
1
0
1
0/1
Don’t use this
(D15 to D8)
P10C
TMP92CM22
P10
P1F
Data bus
W
0
0
0
Note3
0
setting
2007-02-16
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