TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 9
TMP92xy22FG
Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY22FG.pdf
(260 pages)
Specifications of TMP92xy22FG
Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
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3.
3.1
Width of CPU address bus
Width of CPU data bus
Internal operating frequency
Minimum bus cycle
Function of data bus sizing
Internal RAM
Internal I/O
External device
Minimum instruction execution cycle
Conditional jump
Instruction queue buffer
Instruction set
CPU mode
Micro DMA
3.1.1
Operation
This section describes the basic components, functions and operation of the TMP92CM22.
CPU
a description of this CPU’s operation, please refer to the section of this data book which
describes the TLCS-900/H1 CPU.
these functions are not covered in the section devoted to the TLCS-900/H1 CPU.
The TMP92CM22 incorporates a high-performance 32-bit CPU (The TLCS-900/H1 CPU). For
The following sub-sections describe functions peculiar to the CPU used in the TMP92CM22;
Outline
data bus to process instructions more quickly.
“TLCS-900/H1 CPU” is high-speed and high-performance CPU based on
“TLCS-900/L1 CPU”. “TLCS-900/H1 CPU” has expanded 32-bit internal and external
Outline of “TLCS-900/H1” CPU are as follows:
Table 3.1.1 Outline of CPU
92CM22-7
24 bits
32 bits
20 MHz
1-clock access
(50 ns at 20 MHz)
8 bits
32 bits
1-clock access
8-/16-bit
8-/16-bit
8 bits
2-clock access (can insert some waits)
1 clock (50 ns at 20 MHz)
2 clocks (100 ns at 20 MHz)
12 bytes
Compatible with TLCS-900, 900/L, 900/H, 900/L1, and 900/H2
instruction codes (However, NORMAL, MAX, MIN, and LDX
instructions is deleted)
Only maximum mode
8 channels
2-clock access
5-to 6-clock access
900/H1 I/O
900/H1 I/O
TMP92CM22
2007-02-16
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