TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 132

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

Read-modify
-write
instruction is
prohibited
TB0FFCR
(1183H)
Bit symbol
Read/Write
After reset
Function
Always write “11”.
7
−
1
W
6
−
1
TMRB0 Flip-flop Control Register
Figure 3.8.6 Register for TMRB
TB0FF0 inversion trigger
Invert when
the UC10
value is
loaded into
TB0CP1H/L
0: Trigger disable
1: Trigger enable
TB0C1T1
92CM22-130
5
0
Invert when
the UC10
value is
loaded into
TB0CP0H/L
TB0C0T1
4
0
R/W
Timer flip-flop TB0 (TB0FF0) control
Inverted when the UC10 value matches the value in
TB0RG0H/L
Inverted when the UC10 value matches the value in
TB0RG1H/L
Inverted when the UC10 value is loaded into
TB0CP0H/L
Inverted when the UC10 value is loaded into
TB0CP1H/L
00
01
10
11
0
1
0
1
0
1
0
1
Invert when
the UC10
matches
with
TB0RG1H/L
TB0E1T1
Invert
Set to “1”.
Set to “0”.
Don’t care.
Disable inversion
Enable inversion
Disable inversion
Enable inversion
Disable inversion
Enable inversion
Disable inversion
Enable inversion
3
0
Invert when
the UC10
match with
TB0RG0H/L
TB0E0T1
2
0
* Always read as “11”.
TB0FF0 control
00: Invert
01: Set
10: Clear
11: Don’t care
TB0FFC1
1
1
TMP92CM22
2007-02-16
W*
TB0FFC0
0
1