TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 63

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TMP92xy22FG

Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy22FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
(001CH)
(001EH)
(001FH)
P7CR
P7FC
P7
Bit symbol
Read/Write
After reset
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Note: Output latch register is cleared to 0.
Note: Read-modify-write instruction is prohibited for registers P7CR and P7FC.
Internal WAIT signal
7
7
7
0: Port
1:
port (Note)
0: Input
1: Output
Data from
external
Direction control
P76C
Function control
P76F
WAIT
P76
(on bit basis)
(on bit basis)
W
6
6
Output latch
6
0
0
P7CR write
P7FC write
P7 write
Reset
Figure 3.5.11 Register for Port 7
S
Figure 3.5.10 Port 7 (P76)
0: Port
1: R/
Port 7 Function Register
Port 7 Control Register
P75F
P75
5
5
5
1
0
W
Port 7 Register
92CM22-61
0: Port
1:
P7 read
CLKOUT
P74F
P74
4
4
4
1
0
0: Port
1:
Don’t set
P73F
R/W
P73
W
3
3
3
1
0
Output buffer
0: Port
1:
P72F
WRLU
P72
2
2
2
1
0
0: Port
1:
Port P7
P76 (
P71F
WRLL
P71
1
1
1
1
0
WAIT
0: Port
1:
)
P70F
TMP92CM22
RD
P70
0
0
0
1
1
2007-02-16

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