TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 14
TMP92xy22FG
Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY22FG.pdf
(260 pages)
Specifications of TMP92xy22FG
Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
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The clock operating modes are as follows: (a) Single clock mode (X1 and X2 pins only),
(b) Dual clock mode (X1, X2 pins and PLL).
Figure 3.3.1 shows a transition figure.
(Operate only oscillator)
(Operate only oscillator)
The clock frequency input from the X1 and X2 pins is called f
SYSCR1<GEAR2:0> is called the clock f
one cycle of f
oscillator and PLL )
(I/O operation)
(I/O operation)
(I/O operation)
IDLE2 mode
IDLE1 mode
IDLE2 mode
IDLE1 mode
IDLE2 mode
IDLE1 mode
(Operate
SYS
is defined to as one state.
Instruction
Instruction
Interrupt
Instruction
Interrupt
Instruction
Instruction
Interrupt
Instruction
Interrupt
Figure 3.3.1 System Clock Block Diagram
Interrupt
Interrupt
(a)
(b)
Single clock mode transition figure
Dual clock mode transition figure
FPH
(f
(f
92CM22-12
(4 × f
OSCH
OSCH
. The system clock f
NORMAL mode
NORMAL mode
(f
(f
NORMAL mode
OSCH
OSCH
OSCH
(Using PLL)
/gear value/2)
/gear value/2)
Reset
Reset
/gear value/2)
Release reset
/32)
/32)
Release reset
Instruction
OSCH
SYS
and the clock frequency selected by
Instruction
Instruction
is defined as the divided 2 clocks of f
Interrupt
Interrupt
(Stop all circuit )
(Stop all circuit )
STOP mode
STOP mode
TMP92CM22
2007-02-16
FPH
, and
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