TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 240

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

Symbol
B0CSH
B1CSH
B2CSH
B3CSH
B0CSL
B1CSL
B2CSL
B3CSL
(4) Memory controller (1/2)
MEMCT
Name
Block 0
register
Block 0
register
Block 1
register
Block 1
register
Block 2
register
Block 2
register
Block 3
register
Block 3
register
MEMC
control
control
MEMC
control
MEMC
control
MEMC
control
MEMC
control
MEMC
control
MEMC
control
high
high
high
high
low
low
low
low
Address
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
014CH
014DH
0140H
0141H
0144H
0145H
0148H
0149H
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
CS select
0: Disable
1: Enable
CS select
0: Disable
1: Enable
CS select
0: Disable
1: Enable
CS select
0: Disable
1: Enable
B0E
B1E
B2E
B3E
7
0
0
1
0
Write waits
001: 0 waits
101: 2 waits
111: 4 waits
Others: Reserved
Always
write “0”.
Write waits
001: 0 waits
101: 2 waits
111: 4 waits
Others: Reserved
Always
write “0”.
Write waits
001: 0 waits
101: 2 waits
111: 4 waits
Others: Reserved
0: 16 MB
1: Sets
Write waits
001: 0 waits
101: 2 waits
111: 4 waits
Others: Reserved
Always
write “0”.
B0WW2
B1WW2
B2WW2
B3WW2
area
B2M
6
0
−
0
0
−
0
0
0
0
−
0
92CM22-238
Always
write “0”.
Always
write “0”.
Always
write “0”.
Always
write “0”.
B0WW1
B1WW1
B2WW1
B3WW1
W
W
W
W
5
1
0
1
0
1
0
1
0
−
−
−
−
010: 1 wait
110: 3 waits
011:
010: 1 wait
110: 3 waits
010: 1 wait
110: 3 waits
011:
010: 1 wait
110: 3 waits
011:
011:
WAIT
WAIT
WAIT
WAIT
0: No insert
1: Insert
0: No insert
1: Insert
0: No insert
1: Insert
0: No insert
(Default)
1: Insert
B0WW0
B1WW0
B2WW0
B3WW0
B0REC
B1REC
B2REC
B3REC
dummy
cycle
(Default)
dummy
cycle
dummy
cycle
(Default)
dummy
dummy
cycle
(Default)
dummy
cycle
dummy
cycle
dummy
cycle
4
0
0
0
0
0
0
0
0
pin
pin
pin
pin
W
W
W
W
00: ROM/SRAM
01: Reserved
10: Reserved
11: Reserved
00: ROM/SRAM
01: Reserved
10: Reserved
11: Reserved
00: ROM/SRAM
01: Reserved
10: Reserved
11: Reserved
00: ROM/SRAM
01: Reserved
10: Reserved
11: Reserved
B0OM1
B1OM1
B2OM1
B3OM1
3
0
0
0
0
Read waits
001: 0 waits
101: 2 waits
111: 4 waits
Others: Reserved
Read waits
001: 0 waits
101: 2 waits
111: 4 waits
Others: Reserved
Read waits
001: 0 waits
101: 2 waits
111: 4 waits
Others: Reserved
Read waits
001: 0 waits
101: 2 waits
111: 4 waits
Others: Reserved
B0WR2
B1WR2
B2WR2
B3WR2
B0OM0
B1OM0
B2OM0
B3OM0
2
0
0
0
0
0
0
0
0
Data bus width
00: 8 bits
01: 16 bits
10: Reserved
11: Reserved
Data bus width
00: 8 bits
01: 16 bits
10: Reserved
11: Reserved
Data bus width
00: 8 bits
01: 16 bits
10: Reserved
11: Reserved
Data bus width
00: 8 bits
01: 16 bits
10: Reserved
11: Reserved
B0BUS1
B1BUS1
B2BUS1
B3BUS1
B0WR1
B1WR1
B2WR1
B3WR1
0/1
0/1
0/1
0/1
W
W
W
W
1
1
1
1
1
010: 1 wait
110: 3 waits
011:
010: 1 wait
110: 3 waits
011:
010: 1 wait
110: 3 waits
011:
010: 1 wait
110: 3 waits
011:
TMP92CM22
2007-02-16
WAIT
WAIT
WAIT
WAIT
B0BUS0
B1BUS0
B2BUS0
B3BUS0
B0WR0
B1WR0
B2WR0
B3WR0
0/1
0/1
0/1
0/1
0
0
0
0
0
pin
pin
pin
pin