TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 147
TMP92xy22FG
Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY22FG.pdf
(260 pages)
Specifications of TMP92xy22FG
Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
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3.9.2
Operation of Each Circuit
(1) Prescaler
fc
−
SYSCR1<GEAR2:0> is divided by 8 and input to the prescaler as φT0. The prescaler
can be run only case of selecting the baud rate generator as the serial transfer clock.
φT8, and φT32 among the prescaler outputs.
There is a 6-bit prescaler for generating a clock to SIO0. The clock selected using
Table 3.9.2 shows prescaler clock resolution into the baud rate generator.
The serial interface baud rate generator selects between 4 clock inputs: φT0, φT2,
Table 3.9.2 Prescaler Clock Resolution to Baud Rate Generator
<GEAR2:0>
Clock Gear
SYSCR1
100(1/16)
000(1/1)
001(1/2)
010(1/4)
011(1/8)
1/8
−
92CM22-145
fc/128
fc/16
fc/32
fc/64
φT0
fc/8
BR0CR<BR0CK1:0>
fc/128
fc/256
fc/512
Clock Resolution
fc/32
fc/64
φT2
fc/1024
fc/2048
fc/128
fc/256
fc/512
φT8
fc/1024
fc/2048
fc/4096
fc/8192
fc/512
φT32
TMP92CM22
2007-02-16
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