TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 175

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

3.10.2
3.10.3
S
S
S
Slave address
Slave address
Slave address
S:
R/
ACK:
P:
Control
operation status.
8-Bit SIO Mode Control”.
Data Format in I
(a)
(b)
(c)
W
8 bits
8 bits
8 bits
The following registers are used to control the serial bus interface and monitor the
• Serial bus interface 0 control register 1 (SBI0CR1)
• Serial bus interface 0 control register 2 (SBI0CR2)
• Serial bus interface 0 data buffer register (SBI0DBR)
• I
• Serial bus interface 0 status register (SBI0SR)
• Serial bus interface 0 baud rate register 0 (SBI0BR0)
• Serial bus interface 0 baud rate register 1 (SBI0BR1)
The above registers differ depending on a mode to be used.
Refer to Section 3.10.4 “I
Data format in I
: Direction bit
1
1
1
Addressing format
Addressing format (with restart)
Free data format (transfer format transfer from master device to slave device)
Start condition
Acknowledge bit
Stop condition
2
C bus 0 address register (I2C0AR)
W
W
R
R
A
A
C
C
K
K
1
/
/
C
C
1
A
K
1
A
K
2
Figure 3.10.2 Data Format in I
C Bus Mode
2
C bus mode is shown Figure 3.10.3.
1 to 8 bits
Data
1 to 8 bits
1 to 8 bits
1 or more
Data
Data
2
C Bus Mode Control Register” and 3.10.7 “Clocked-synchronous
92CM22-173
1 or more
A
C
K
1
1 or more
A
C
K
A
C
K
1
1
S
1 to 8 bits
Data
Slave address
1 to 8 bits
2
Data
C Bus Mode
8 bits
1
C
A
K
1
C
1
A
K
P
W
R
/
P
A
C
K
1
1 to 8 bits
1 or more
Data
TMP92CM22
2007-02-16
C
A
K
1
P