CD2401 Intel, CD2401 Datasheet - Page 10

• Manufacturer Part Number: CD2401
• Description: Multi-protocol Communications Controller
• Manufacturer: Intel

CD2401 — Multi-Protocol Communications Controller
10
Bisync Features
X.21 Features
On-Chip DMA Controller Features
Other Features
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Programmable for ASCII or EBCDIC encoding
Support for transparent Bisync
Recognition of all special characters enabling:
Chaining of long receive blocks into multiple buffers
Full support for X.21 protocol
Detection of steady-state conditions
Transmission of steady-state conditions synchronized to modem lead
Programmable SYN character
1 or 2 SYN character detect option
Idle in any line condition
Optional SYN strip on receive
DMA Master or interrupt-selectable per channel and per direction
Dual-configuration register sets to reduce realtime constraints
Append and Block mode DMA
Chain/unchain of long frames into multiple buffers
32-bit address and 8- or 16-bit data transfer
Programmable gap in buffers following a receive character exception
Improved interrupt schemes
Easily cascaded for multiple-device configurations
16-byte receive and transmit FIFOs
Local and remote maintenance loopback modes
Byte-endian-orientation selection pin that allows easy interface to 80X86 and 680X0
processors
Eight clock/modem control signals per channel
(in addition to TxD and RxD)
— Block separation
— CRC generation and validation
— Vectored interrupts per channel allow direct jump into proper service routines
— Good Data interrupts eliminate need for status checks
Datasheet