CD2401 Intel, CD2401 Datasheet - Page 101

• Manufacturer Part Number: CD2401
• Description: Multi-protocol Communications Controller
• Manufacturer: Intel

Datasheet
Register Name: COR3
Register Description: Channel Option 3
Default Value: x’00
Access: Byte Read/Write
ESCDE
Bit 7
COR3 — Asynchronous Mode
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bits 2:0
RngDE
Bit 6
Extended Special Character Detect Enable
0 = special character detect for SCHR3 and SCHR4 disabled.
1 = special character detect for SCHR 3 and SCHR4 enabled. A special character
interrupt is generated following the receipt of a character matching SCHR3 or
SCHR4.
Range Detect Enable
0 = range detect disabled.
1 = characters between SCRl and SCRh (inclusive) generate special character inter-
rupts.
Flow Control Transparency mode
0 = flow control characters received are passed to the host by receive exception inter-
rupts.
1 = flow control characters received are not passed to the host.
This bit has no effect unless both TxIBE (COR2) and SCDE (COR3) are set.
Special Character Detection Enable
0 = special character detect for SCHR1 and SCHR2 disabled.
1 = special character detect for SCHR1 and SCHR2 enabled.
This bit must be set along with TxIBE (COR2[6]) before FCT (COR3[5]) becomes
effective.
Special Character I-Strip
When this bit is set, the receive character is I-Stripped (COR3[7] = 0) for the special
character matching functions only. The character passed to the host is unaffected.
This function allows special character processing of data without knowing if the data
is 8-bits no parity or 7-bits with parity.
Stop bit length [2:0]
These bits specify the length of the Stop bit.
Bit 5
FCT
pad2
1
1
SCDE
Bit 4
Multi-Protocol Communications Controller — CD2401
through
pad1
0
1
Splstp
Bit 3
pad0
1
1
Stop2
Bit 2
Motorola Hex Address: x’16
Function
Reserved
Stop1
Bit 1
Intel Hex Address: x’15
Stop0
Bit 0
101