CD2401 Intel, CD2401 Datasheet - Page 115

• Manufacturer Part Number: CD2401
• Description: Multi-protocol Communications Controller
• Manufacturer: Intel

8.3.2
8.3.2.1
8.3.2.2
Datasheet
Register Name: TBPR
Register Description: Transmit Bit Rate Period
Default Value: x’81
Access: Byte Read/Write
Register Name: TCOR
Register Description: Transmit Clock Option
Default Value: x’00
Access: Byte Read/Write
ClkSel2
Bit 7
Bit 7
Note: See the detailed description of clock options in
Transmit Bit Rate Generator Registers
Transmit Bit Rate Period Register (TBPR)
This register contains the preload value for the transmit bit rate count. When using one of the
internal clocks or an n-times external clock, the preload value, in conjunction with the transmitter
clock source chosen, determines the transmit bit rate. If a 1 external clock or the receive clock is
used, a value of 01h must be loaded in the TBPR.
Transmit Clock Option Register (TCOR)
This register controls the transmit BRG and Local Loopback mode.
Bits 7:5
ClkSel1
Bit 6
Bit 6
Clock Select [2:0]
These bits select the clock source for the transmit BRG.
ClkSel0
Bit 5
Bit 5
ClkSel2
0
0
0
0
1
1
1
1
Transmit Bit Rate Period (Divisor)
Bit 4
Bit 4
0
Multi-Protocol Communications Controller — CD2401
ClkSel1
0
0
1
1
0
0
1
1
Ext-1X
Bit 3
Bit 3
Section 5.5 on page
ClkSel0
0
1
0
1
0
1
0
1
Bit 2
Bit 2
0
58.
Clk 0
Clk 1
Clk 2
Clk 3
Clk 4
Reserved
External clock
Receive clock
Motorola Hex Address: x’C3
Motorola Hex Address: x’C0
Bit 1
Bit 1
LLM
Clock Source
Intel Hex Address: x’C1
Intel Hex Address: x’C2
Bit 0
Bit 0
0
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