CD2401 Intel, CD2401 Datasheet - Page 117

• Manufacturer Part Number: CD2401
• Description: Multi-protocol Communications Controller
• Manufacturer: Intel

Datasheet
Warning:
Note: Processing CCR commands is a low-priority task for the internal firmware, since they seldom
occur. The user must take care when waiting for command completions at critical times, that is,
during interrupt service routines.
Bit 7
Bit 6
Bit 5
If the Initialize Channel command is issued after a channel is already in operation, then a Clear
Channel command must be issued prior to, or coinciding with the Initialize Channel command.
Failure to observe this requirement will result in unpredictable device behavior.
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
For mode 1, this bit must be ‘0’.
Clear Channel command
When this command is issued, the CD2401 clears the data FIFOs and current trans-
mit and receive status of the channel in the CSR. If the channel is currently transmit-
ting a frame in synchronous protocol, the host should issue the Transmit Abort
special transmit command prior to issuing a clear command. Channel parameters are
not affected by a Clear Channel command. The Clear Channel command causes both
receive and transmit FIFOs to be cleared, the transmitter and receiver to be disabled
and all DMA Status registers (DMABSTS, A/BRBSTS and A/BTBSTS) to be
cleared.
Initialize Channel
If any change is made to the Protocol Mode Select bits in the CMR or COR1, the
channel must be reinitialized by this command. The Initialize Channel command
causes the internal protocol-specific registers to be initialized.
Reset All
An on-chip firmware initialization of all channels is performed. All channel and glo-
bal parameters are reset to their power-on reset condition. This command is the
strongest the host can issue. None of the other command bits is interpreted if the
Reset All command is given. The host must reinitialize the CD2401 following the
execution of this command, just like after a hardware power-on reset. When this
command is complete, the GFRCR is updated with the firmware revision code.
Enable Transmitter
This bit enables the transmitter by setting the TxEn bit (CSR[3]). In Asynchronous
mode, this command also clears the transmit flow control options.
Disable Transmitter
This bit disables the transmitter by clearing the TxEn bit (CSR[3]). In Asynchronous
mode, the transmit flow control bits are cleared.
Enable Receiver
This bit enables the receiver by setting the RxEn bit (CSR[7]). In Asynchronous
mode, the receive flow control bits are also cleared.
Disable Receiver
This bit disables the receiver by clearing the RxEn bit (CSR[7]). In Asynchronous
mode, the Receive Flow Control bits are also cleared.
Multi-Protocol Communications Controller — CD2401
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