CD2401 Intel, CD2401 Datasheet - Page 124

• Manufacturer Part Number: CD2401
• Description: Multi-protocol Communications Controller
• Manufacturer: Intel

CD2401 — Multi-Protocol Communications Controller
8.5
8.5.1
8.5.1.1
124
Register Name: LIVR
Register Description: Local Interrupt Vector
Default Value: x’00
Access: Byte Read/Write
Bit 7
X
Note: If the transmit clock source is a 1 clock on TXCIN/CD*, this signal cannot be driven on
Bit 6
Bit 5
Bit 4
TXCOUT/DTR*.
Bit 3
Bit 2
Bit 1
Bit 0
Interrupt Registers
General Interrupt Registers
Local Interrupt Vector Register (LIVR)
The host effectively controls bits 7:2; the device provides bits 1:0 within an interrupt acknowledge
context.
The CD2401 has one Local Interrupt Vector register per channel, each with six host-defined bits.
The host can opt to embed the channel number and the protocol in use in the channel vector. The
CD2401 supplies two modified bits signifying the type of interrupt service required.
Bits 7:2
Bits 1:0
Bit 6
X
This bit reflects the current state of CD*.
This bit reflects the current state of CTS*.
DTR option (written by MSVR-DTR)
0 = the value of MVSR-DTR[1] is output on TXCOUT/DTR*.
1 = the transmit clock is output on TXCOUT/DTR*.
Reserved – must be ‘0’.
Unused – always returns ‘0’ when read; writing has no effect.
This bit reflects the current state of DTR*.
This bit reflects the current state of RTS*.
User-defined. These six bits can be used as the CD2401 device ID number.
Interrupt Type [1:0]
These two bits indicate the group/type of interrupt occurring.
Bit 5
X
Bit 4
X
Bit 3
X
Bit 2
X
Motorola Hex Address: x’09
Bit 1
IT1
Intel Hex Address: x’0A
Datasheet
Bit 0
IT0