CD2401 Intel, CD2401 Datasheet - Page 122

• Manufacturer Part Number: CD2401
• Description: Multi-protocol Communications Controller
• Manufacturer: Intel

CD2401 — Multi-Protocol Communications Controller
122
Register Name: CSR
Register Description: Channel Status
Default Value: x’00
Access: Byte Read/Write
Register Name: CSR
Register Description: Channel Status
Default Value: x’00
Access: Byte Read/Write
RxEn
RxEn
Bit 7
Bit 7
Bisynchronous Mode
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X.21 Mode
Bit 7
RxITB
Bit 6
Bit 6
0
RxFrame
Receiver Enabled status
0 = receiver disabled.
1 = receiver enabled.
Receive ITB
This bit indicates that the last frame received was terminated with an ITB. This
means that the leading character of the next receive frame is included in the BCC cal-
culation (see
Receive Frame
When this bit is set, it indicates that the CD2401 is currently receiving a frame.
Reserved – always returns ‘0’ when read.
Transmitter Enabled status
0 = transmitter disabled.
1 = transmitter enabled.
Transmit ITB
This bit is set if the last frame transmitted ended with an ITB character (that is, the
leading character of the next frame is included in the BCC calculation).
Transmit Frame status
When this bit is set, it indicates that the CD2401 is currently transmitting a frame.
Reserved – always returns ‘0’ when read.
Receiver Enabled status
0 = receiver disabled.
1 = receiver enabled.
RxSpc
Bit 5
Bit 5
Table 16 on page
Bit 4
Bit 4
0
0
TxEn
TxEn
Bit 3
Bit 3
82).
TxITB
Bit 2
Bit 2
0
Motorola Hex Address: x’1A
Motorola Hex Address: x’1A
TxFrame
TxSpc
Bit 1
Bit 1
Intel Hex Address: x’19
Intel Hex Address: x’19
Datasheet
Bit 0
Bit 0
0
0