CD2401 Intel, CD2401 Datasheet - Page 137

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CD2401

Manufacturer Part Number
CD2401
Description
Multi-protocol Communications Controller
Manufacturer
Intel
Datasheet
8.5.3.4
8.5.3.5
Datasheet
Register Name: TFTC
Register Description: Transmit FIFO Transfer Count
Default Value: x’00
Access: Byte Read only
Register Name: TDR
Register Description: Transmit Data
Default Value: x’00
Access: Byte Write only
Bit 7
Bit 7
D7
0
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Transmit FIFO Transfer Count (TFTC)
Bits 7:5
Bits 4:0
Transmit Data Register (TDR)
This register accesses the transmit data FIFO of a channel interrupting for transmit data transfer.
This register address is used for all channels to transfer transmit FIFO data to the host, if
programmed in Interrupt Transfer mode. Data must be written as bytes, and follows the rules for
positioning valid data on the bus as outlined in
high, data must be valid on A/D[7:0]; if BYTESWAP is low, data must be valid on A/D[15:8]
because the TDR is on an even address.
Bit 6
Bit 6
D6
0
Transmit underrun
Data was not available in time during the synchronous frame transmission and an
underrun error occurred. After a transmit underrun, all data up to the next EOF is dis-
carded.
Buffer A or B interrupt
0 = transmit buffer A.
1 = transmit buffer B.
Reserved – always returns ‘0’ when read.
Transmitter Empty
All characters were completely transmitted and the serial output is idle.
Transmit Data
This bit indicates that the number of characters in the FIFO is below the threshold.
Reserved – always returns ‘0’ when read.
Transmit Data Count [4:0]
If the transmit channel is interrupt-driven, a non-zero value is a request for data.
These bits give the number of spaces available in the transmit FIFO.
Bit 5
Bit 5
D5
0
TxCt4
Bit 4
Bit 4
D4
Multi-Protocol Communications Controller — CD2401
TxCt3
Bit 3
Bit 3
D3
Section 7.4 on page
TxCt2
Bit 2
Bit 2
D2
90. If the BYTESWAP pin is
Motorola Hex Address: x’F8
Motorola Hex Address: x’80
TxCt1
Bit 1
Bit 1
D1
Intel Hex Address: x’F8
Intel Hex Address: x’83
TxCt0
Bit 0
Bit 0
D0
137

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