mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 102

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mfr4200

Manufacturer Part Number
mfr4200
Description
Flexray Communication Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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MFR4200 FlexRay Communication Controller
the value of this register lies in the range [1:15]; however, the current implementation supports values in
the range [1:32767].
3.2.3.5.4
Address 0x2C, 0x2E
Reset
Channel status error counters CSEC0R and CSEC1R wrap around after they reach the maximum value.
These registers are reset when leaving the configuration state.
CSEC0R is assigned to channel A of the CC.
CSEC1R is assigned to channel B of the CC.
The controller generates a slot status vector for:
The controller increments the corresponding channel status error counter once if any slot status error bit
(bits 0–3 of the slot status vector) is set.
Channel status error counters are independent of other slot status monitoring mechanisms, i.e. message
buffers
registers
(Section 3.2.3.5.7, “Slot Status Counter n Register, n = [0:7]
102
CNT15
CNT7
15
rh
rh
7
0x0
every static slot
dynamic slots during which the controller receives or transmits a frame
symbol window
network idle time on either channel
(Section 3.2.3.7, “Message Buffers and FIFO Configuration Related
(Section 3.2.3.6.8, “Slot Status n Register with n = [0:7]
Channel Status Error Counter n Register, n = [0:1] (CSECnR)
CNT14
CNT6
14
rh
rh
To determine the number of errors that occurred during a certain period
of time, the host must store intermediate values of the channel status
error counters.
If a frame exceeds a slot boundary, the controller increments the channel
status error counter twice, because a slot boundary violation always
affects two slots.
6
Figure 3-66. Channel Status Error Counter n Register, n = [0:1]
CNT13
CNT5
13
rh
rh
5
MFR4200 Data Sheet, Rev. 0
CNT12
CNT4
12
rh
rh
4
NOTE
CNT11
CNT3
11
rh
rh
3
(SSCnR)”).
(SSnR)”), and slot status counters
CNT10
CNT2
10
rh
rh
2
Registers”), slot status
CNT9
CNT1
Freescale Semiconductor
rh
rh
9
1
CNT8
CNT0
rh
rh
8
0

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