mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 134

• Manufacturer Part Number: mfr4200
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

MFR4200 FlexRay Communication Controller
3.2.3.8
3.2.3.8.1
Address 0xF0
Reset
If ENSYNFF bit is set (see
sync frame with the identifier ID must fulfill the following condition before its arrival time measurement
values can be used for the clock synchronization.
An identifier is accepted when:
This register may be written only in the configuration state.
3.2.3.8.2
Address 0xEE
Reset
SYNFAFM[10:0]
0 – This bit position is “don't care” for acceptance.
1 – This bit of the identifier must be identical to the corresponding bit in the acceptance value, for it to be
accepted by the sync frame acceptance filter.
This register may be written only in the configuration state.
134
SYNFAFM7
SYNFAFV7
Reserved
Reserved
rw*
rw*
15
15
7
7
r
r
undefined state
undefined state
( NOT((ID XOR SynFAFV) AND SynFAFM) AND NOT(ID == SynFRF) ) == TRUE
Filtering Related Registers
Sync Frame Acceptance Filter Value Register (SYNFAFVR)
Sync Frame Acceptance Filter Mask Register (SYNFAFMR)
SYNFAFM6
SYNFAFV6
Reserved
Reserved
rw*
rw*
14
14
6
6
r
r
Figure 3-106. Sync Frame Acceptance Filter Value Register
Figure 3-107. Sync Frame Acceptance Filter Mask Register
Section 3.2.3.2.1, “Module Configuration Register 0
SYNFAFM5
SYNFAFV5
Reserved
Reserved
rw*
rw*
13
13
5
5
r
r
MFR4200 Data Sheet, Rev. 0
SYNFAFM4
SYNFAFV4
Reserved
Reserved
rw*
rw*
12
12
4
4
r
r
SYNFAFM3
SYNFAFV3
Reserved
Reserved
rw*
rw*
11
11
3
3
r
r
SYNFAFM10
SYNFAFV10
SYNFAFM2
SYNFAFV2
rw*
rw*
rw*
rw*
10
10
2
2
(MCR0)”), every valid
SYNFAFM9
SYNFAFM1
SYNFAFV9
SYNFAFV1
Freescale Semiconductor
rw*
rw*
rw*
rw*
9
1
9
1
SYNFAFM8
SYNFAFM0
SYNFAFV8
SYNFAFV0
Eqn. 3-12
rw*
rw*
rw*
rw*
8
0
8
0