mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 231

• Manufacturer Part Number: mfr4200
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

A.3
This section summarizes the electrical characteristics of the various startup scenarios for the Oscillator.
A.3.1
Table A-11
startup behavior can be found in the MFR4200 Clock and Reset Generator (CRG) Block User Guide.
A.3.1.1
The release level V
V
oscillator is started. The fastest startup time possible is given by n
function implemented.
A.3.1.2
The assert level V
is given by n
A.3.1.3
When external reset is asserted for a time greater than PW
reset, and the CC starts operations without doing a clock quality check, if there was an oscillation before
reset.
Freescale Semiconductor
Conditions are shown in
Num
DD
1
2
3
4
Supply. They are also valid if the device is powered externally. After releasing the POR reset the
C
D Reset input pulse width, minimum input time
D Startup from external reset negation
T POR release level
T POR assert level
Reset and Oscillator
summarizes several startup characteristics explained in this section. Detailed description of the
Startup
uposc
POR
LVR
External Reset
. There is no clock monitoring function implemented.
LVRA
PORR
Table A-4
(see
(see
Table
Rating
unless otherwise noted
Table
A-9) is derived from the V
Table A-11. Startup Characteristics
A-9) and the assert level V
MFR4200 Data Sheet, Rev. 0
Symbol
PW
V
V
n
PORR
PORA
PSST
RSTL
RSTL
DD
PORA
the CRG module generates an internal
Supply. The fastest startup time possible
uposc
0.97
Min
(see
25
2
-
. There is no clock monitoring
Table
A-9) are derived from the
Typ
27
-
-
-
Reset and Oscillator
Max
2.07
30
-
-
Unit
n
t
osc
V
V
osc
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