mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 81

• Manufacturer Part Number: mfr4200
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

3.2.3.3.20
FlexRay protocol related parameter – gdMaxDrift
Address 0xB8
Reset
This register defines the number of microticks for a communication cycle of another CC with the
maximum deviation of 1500 ppm with respect to the local oscillator.
Writing this register is possible only during the configuration state. The value for the MCLDAR is
calculated from
3.2.3.3.21
FlexRay Protocol Related Parameter – pExternOffsetCorrection
Address 0xF4
Reset
This register holds the absolute value of the initial external offset correction to be applied, together with
the internal clock synchronization value (see
(ECCR)”). The host may write this register during the configuration state only. The register value is
expressed in microticks.
Freescale Semiconductor
Reserved
MCLDA7
EOC15
EOC7
rw*
rw*
rw*
15
15
7
7
r
undefined state
undefined state
Maximum Cycle Length Deviation Register (MCLDAR)
External Offset Correction Register (EOCR)
Reserved
MCLDA6
Equation
EOC14
EOC6
rw*
rw*
rw*
14
14
6
6
r
Figure 3-33. Maximum Cycle Length Deviation Register
3-5:
MCLDAR = ceil ( cycle_length[µT] * 1.5*10-3 )
Reserved
Figure 3-34. External Offset Correction Register
MCLDA5
EOC13
EOC5
rw*
rw*
rw*
13
13
5
5
r
MFR4200 Data Sheet, Rev. 0
Reserved
MCLDA4
EOC12
EOC4
rw*
rw*
rw*
12
12
Section 3.2.3.3.23, “External Correction Control Register
4
4
r
Reserved
MCLDA3
EOC11
EOC3
rw*
rw*
rw*
11
11
3
3
r
Reserved
MCLDA2
EOC10
EOC2
rw*
rw*
rw*
10
10
2
2
r
MCLDA9
MCLDA1
Memory Map and Registers
EOC9
EOC1
rw*
rw*
rw*
rw*
9
1
9
1
MCLDA8
MCLDA0
EOC8
EOC0
Eqn. 3-5
rw*
rw*
rw*
rw*
8
0
8
0
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