mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 192

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mfr4200

Manufacturer Part Number
mfr4200
Description
Flexray Communication Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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MFR4200 FlexRay Communication Controller
3.7.1.1
Where:
I – input pin; O – output pin; I/O – input/output pin
3.7.2
The MFR4200 HCS12 interface with HCS12 EBI paged mode support is shown in
The FlexRay CC to HCS12 connection with HCS12 EBI unpaged mode support is shown in
192
Signal name
IF_SEL[0:1]
RD/WR#
D[15:0]
IRQn#
A[9:1]
CSn#
OE#
The MFR4200 HCS12 interface supports the paged and unpaged modes of the HCS12 external bus
interface connected to it.
The MFR4200 HCS12 interface is implemented as a synchronous HCS12 external bus slave
module, thus enabling fast data exchange between them.
The MFR4200 HCS12 interface decodes addresses of read/write transactions to its internal
registers and generates its internal CS signal with the use of the address/data lines PAD[0:15],
ACS[0:5] and XADDR[14:19] (see
— The address and data lines PAD[0:15] are multiplexed. They are denoted ADR[0:15] when
MFR4200 HCS12 Interface
referring to the address and DATA[0:15] when referring to the data. The MFR4200 is selected
only when the address ADR[10:15] matches ACS[0:5] (ADR[10] matches ACS[0], ADR[11]
matches ACS[1], etc.), and the address XADDR[14:19] matches 0.
AMI Interface Signals and Pins Description
MCU External Bus and
Memory Controller Pin
RD/WR#
D[15:0]
IRQn#
Name
A[9:1]
CSn#
OE#
Table 3-20. AMI Interface Signals and Pins Description
I/O*
I/O
O
O
O
O
I
MFR4200 Data Sheet, Rev. 0
IF_SEL[0:1]
Figure
INT_CC#
FlexRay CC MCU
D[15:0]
Name
A[9:1]
WE#
OE#
CE#
Interface Pin
3-147).
I/O
I/O
O
I
I
I
I
I
Data Bus, D0 is the LSB of data
Address Bus, A1 is the LSB of address
Read/Write – Indicates the direction of the data
transfer for a transaction. A logic one indicates a
read from a slave device; a logic zero indicates a
write to a slave device.
Output Enable Signal, controls AMI data output
during read transactions
Interrupt Request (level sensitive) – One of the
eight external lines that can request, by means of
the internal interrupt controller, a service routine
from the MPC555.
Interface Select – FlexRay CC MCU interface
configuration pins
Chip Select/Chip Enable – These signal enable
peripheral or memory devices at programmed
addresses if defined appropriately in the memory
controller.
Function Description
Figure
Freescale Semiconductor
3-145.
Figure
3-146.

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