mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 251

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mfr4200

Manufacturer Part Number
mfr4200
Description
Flexray Communication Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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C.6
The implementation is compliant with PS V1.1, with the following exceptions.
C.7
C.7.1
The implementation is compliant with PS V1.1.
C.7.2
The functionality of the wakeup is implemented in part only. The controller can generate wakeup symbols
on configurable channels and repeat them for a configurable number of times in accordance with
WAKEUP SEND.
WAKEUP LISTEN is not implemented. After completing WAKEUP SEND, the controller returns to the
CONFIG state.
C.7.3
Clearing the coldstart inhibit bit after leaving 'PC_RESET' is not supported in MFR4200. This applies for
the following subsections.
C.7.3.1
The implementation is compliant with PS V1.1.
C.7.3.2
The implementation is compliant with PS V1.1.
C.7.3.3
The implementation is compliant with PS V1.1.
C.7.3.4
The implementation is compliant with PS V1.1. However, the protocol state indicated in the host interface
is incorrect for a short time, in the following case:
When the node has unsuccessfully performed a coldstart, and the number of remaining coldstart attempts
is 0, the host interface indicates that the controller has entered the coldstart listen state, and will change to
the integration listen state only after approximately one macrotick.
Freescale Semiconductor
STUP is not indicated to the host.
Data received during startup is not provided to the host.
Frame and Symbol Processing
Wakeup, Startup, and Reintegration
Introduction
Cluster Wakeup
Communication Startup and Reintegration
Definitions and Properties
Principle of Operation
Coldstart Inhibit Mode
Startup State Diagram
MFR4200 Data Sheet, Rev. 0
Frame and Symbol Processing
251

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