mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 154

• Manufacturer Part Number: mfr4200
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

MFR4200 FlexRay Communication Controller
0 – The corresponding message buffer interrupt is disabled.
This bit is not used for the FIFO.
3.4.1.4
The bit has various functions depending on the configuration of the corresponding message buffer.
The host can implicitly lock/unlock the buffer by writing ‘1’ to the LOCK bit. Writing a ‘1’ to the LOCK
bit toggles the value of the LOCK bit:
Receive FIFO:
The host must lock a FIFO buffer to make it accessible in the active receive FIFO buffer window. The host
can request a FIFO buffer lock by writing a ‘1’ to the LOCK bit of buffer 0, provided the FIFO is
configured. Writing a ‘0’ to the LOCK bit has no effect on the bit. An attempt to lock the FIFO through,
not buffer 0, but another FIFO buffer’s LOCK bit, causes a FIFO buffer lock error (see
“CHI Error Register
Receive message buffer:
The host must lock a receive message buffer in order to make it accessible in the active receive message
buffer window. The host can request a message buffer lock by writing a’1’ to the LOCK bit. Writing a ‘0’
to the LOCK bit has no effect on the bit. When the buffer is locked, the LOCK bit read operation returns
‘1’.
Transmit message buffer:
The host must lock the buffer in order to make it accessible through the active transmit message buffer
window. The host can request a buffer lock by writing a ‘1’ to the LOCK bit. Writing a ‘0’ to the LOCK
bit has no effect on this bit. When the buffer is locked, the LOCK bit read operation returns ‘1’. A buffer
committed for transmission (appropriate BUFCMT bit is ‘1’) cannot be locked. If the host sends a lock
request for the committed transmit message buffer, a lock error will be raised (see
Error Register
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A buffer is locked when the LOCK bit read operation returns ‘1’.
A buffer is unlocked when the LOCK bit read operation returns ‘0’.
LOCK — Message Buffer Lock Request
(CHIER)”).
•
•
For more information about the locking/unlocking procedure, see
Section 3.5.3.4, “Active Buffers Locking/Unlocking and Locking
Timing”.
Writing to the LOCK bit causes all other bits of a message buffer control
and status register to be ignored for this write access to the buffer control
register, i.e. it is not possible to update the buffer control register with
the same write operation as toggles the locked/unlocked status of the
buffer. The lock/unlock request is not stored — there is no pending lock
request.
(CHIER)”).
MFR4200 Data Sheet, Rev. 0
NOTE
Section 3.2.3.6.3, “CHI
Freescale Semiconductor
Section 3.2.3.6.3,