mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 168

• Manufacturer Part Number: mfr4200
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

MFR4200 FlexRay Communication Controller
Configuration Procedure during Configuration State
During this internal initialization procedure, the CC initializes its internal memory, including the following
message buffer configuration/control parameters.
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1. The CC enters the configuration mode after a hard reset or by the CONFIG bit in the MCR0 register
2. After the CC has entered the configuration state, the host configures a message buffer:
3. After the host has configured the message buffers, it requests the CC to leave the configuration
4. After the CC leaves the configuration state, it goes to the normal mode of operation (see
•
•
•
being set (see
all message buffers are initialized to as receive message buffers disabled for receive operations
(frame ID=0x0). All the bits in the BUFCSnR registers are initialized to 0; the frame ID fields and
CCFnR are cleared (to 0).
— The host configures the BUFCSnR register (CFG, IENA, CHA, CHB, BT, CCFE, and TT bits)
— The host configures the CCFnR register of the message buffer.
— The host locks a message buffer in accordance with
— After the message buffer is locked, the host configures the remaining configuration fields of the
— The host unlocks the message buffer.
state by setting the CONFIG bit in the MCR0 register to ‘0’. Configuration becomes active after
the CC leaves the configuration state.
Section 3.9, “Communication Controller
Frame ID = 0x0
CCFnR: Cycle Count Mask and Cycle Counter Value fields = ‘0’s
BUFCSnR:
— BUFCMT = 0
— ChA,ChB = 0
— BT= 0
— CCFE = 0
— TT = 0
— LOCK = 0
— IFLG = 0
— VALID = 0
— IENA = 0
(see
Locking/Unlocking and Locking
message buffer in accordance with the configuration principles (see below).
After leaving the hard reset state (the hard reset signal is negated), on the
next rising edge of the CC_CLK signal, the CC starts performing an internal
initialization procedure (see
Section 3.2.3.1.3, “Magic Number Register
Section 3.4.1, “Message Buffer Control, Configuration and Status
Section 3.2.3.2.1, “Module Configuration Register 0
MFR4200 Data Sheet, Rev. 0
Section 3.9.1, “Hard Reset
Timing”.
States”).
NOTE
(MNR)”).
Section 3.5.3.4, “Active Buffers
State” and
(MCR0)”). After a hard reset,
Register”).
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