mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 163

• Manufacturer Part Number: mfr4200
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

Buffer 0 is configured as a receive FIFO buffer; the remaining buffers are configured as receive or transmit
message buffers.
3.5.3.4
The host accesses any buffer through the active buffers by using the locking/unlocking mechanism.
The LOCK bit serves as locking request (control data) and acknowledgement (status data) at the same time
(hence, the host write and read operations to that bit return different values). For a detailed description of
the LOCK bit, refer to
Set”.
Locking/unlocking procedure:
Freescale Semiconductor
1. The host sends a message buffer lock request by writing ‘1’ to the appropriate LOCK bit of the
Figure 3-132. Buffer Control, Configuration, Status/Filtering Register Set for Receive FIFO Buffers
message buffer in the BUFCSnR register (see
Configuration and Status
Configuration, Status and
(4 Words X 59 Buffers)
Filtering Registers Set
Buffer Control,
Active Buffers Locking/Unlocking and Locking Timing
472 Bytes
Section 3.4, “Message Buffer Control, Configuration, Status and Filtering Register
Register”).
MFR4200 Data Sheet, Rev. 0
Message Buffer 0 — Configured as a Receive FIFO Buffer
Message Buffer 58
Message Buffer Control, Configuration and Status
Message Buffer Control, Configuration and Status
Cycle Counter Filter 0 Register (CCF58R)
Section 3.4.1, “Message Buffer Control,
Register (BUFCS58R)
Register (BUFCS0R)
Not used
...
...
...
Message Buffer Handling and Operations
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