mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 105

• Manufacturer Part Number: mfr4200
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

3.2.3.5.8
Address SSCC0R=0x5C, SSCC1R=0x5E, SSCC2R=0x60, SSCC3R=0x62, SSCC4R=0x64, SSCC5R=0x66, SSCC6R=0x68,
SSCC7R=0x6A
Reset
Each of these registers serves as condition to detect if the corresponding slot status counter (see
Section 3.2.3.5.7, “Slot Status Counter n Register, n = [0:7]
SSCMx, x = [0:3] — Slot Status Mask
A binary AND operation is performed on this 4-bit vector and the status of each slot-channel tuple that is
not booked for transmission in the static part of the communication cycle.
If the result is 0, and conditions for null frame selection (NULLS), sync frame selection (SYNCS), startup
frame selection (SUPFS), and valid communication element selection (VCES) are not met, the counter will
not be incremented for that slot-channel tuple.
NULLFS — NULL Frame Selection
This register is used to restrict counting to received null frames only.
Freescale Semiconductor
Reserved
VCES
15
rw
7
r
0x0
Slot Status Counter Condition n Register, n = [0:7] (SSCCnR)
•
•
•
•
•
Reserved
SYNCFS
14
rw
Slot status registers SSnR configured via slot status selection registers
SSSnR, as described in
n = [0:7]
Register, n = [0:3]
Channel status error counters CSEC0R and CSEC1R, as described in
Section 3.2.3.5.4, “Channel Status Error Counter n Register, n = [0:1]
(CSECnR)”.
Slot status information within message buffers, as described in
Section 3.3.3, “Message Buffer Slot Status
Slot status counter registers SSCnR configured via slot status counter
condition registers SSCCnR as described in
Status Counter n Register, n = [0:7]
“Slot Status Counter Condition n Register, n = [0:7]
Refer to
protocol states.
6
r
Figure 3-70. Slot Status Counter Condition n Register, n = [0:7]
Table 3-4
(SSnR)” and
Reserved
NULLFS
13
rw
5
r
(SSSnR)”.
for slot status monitoring availability in different
MFR4200 Data Sheet, Rev. 0
Section 3.2.3.5.6, “Slot Status Selection n
Reserved
Section 3.2.3.6.8, “Slot Status n Register with
SUPFS
12
rw
4
r
(SSCnR)” and
Reserved
SSCM3
11
rw
3
r
(SSCnR)”) is to be incremented.
Vector”.
Section 3.2.3.5.7, “Slot
CHCFG1
SSCM2
Section 3.2.3.5.8,
(SSCCnR)”.
10
rw
rw
2
CHCFG0
SSCM1
Memory Map and Registers
rw
rw
9
1
MULTCYC
SSCM0
rw
rw
8
0
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