mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 215

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mfr4200

Manufacturer Part Number
mfr4200
Description
Flexray Communication Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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5.2.2.1
When the power-on or low voltage reset signals are asserted, the CRG sets the internal reset signal. The
CRG will negate synchronously the internal reset signal, approximately 16000 EXTAL/CC_CLK clock
ticks after the negation of the power-on or low-voltage reset signals.
While the internal reset signal is asserted due to a power-on or low-voltage situation, the pins CLK_S[0:1]
and IF_SEL[0:1] are latched and the CLKOUT is disabled. After the CRG negates the internal reset signal
the FlexRay core will:
Freescale Semiconductor
1. generate CLKOUT signal with frequency indicated by the values latched in CLK_S[0:1],
2. select the required host interface with the last value latched in IF_SEL[0:1] signals.
CLK_Sx - IF_SELx
CLKOUT
VDD
power_on reset
internal_reset
VDD
power_on reset
internal_reset
CLK_Sx – IF_SELx
CLKOUT
low_voltage
internal_reset
CLK_Sx - IF_SELx
CLKOUT
low_voltage
internal_reset
CLK_Sx – IF_SELx
CLKOUT
Power-on or Low Voltage Reset
See
4/10 MHz Output
Section 3.7, “Host Controller
Clock” for a description of the encoding of these pins.
Figure 5-2. Low Voltage Reset
Figure 5-1. Power-on Reset
MFR4200 Data Sheet, Rev. 0
NOTE
Interfaces” and
latching window
latching window
latching window
~16000
~16000
~ 16000
~16000
latching
Section 3.8, “External
low_level_voltage
Functional Description
215

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