mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 136

• Manufacturer Part Number: mfr4200
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

MFR4200 FlexRay Communication Controller
CCV[0:5] — Cycle Count Value n Bit[0:5]
These bits determine the cycle count value to be used for the cycle filtering.
CCM[0:5] — Cycle Count Mask n Bit[0:5]
These bits define the mask used in the filtering process.
0 – This bit of the cycle counter is not used for filtering.
1 – This bit of the cycle counter is used for filtering.
For a description of the read and write character of each bit-field, refer to
Control, Configuration and Status
3.2.3.8.5
Address 0x1C
Reset
FMDAFV[0:15]
These bit-fields define the FIFO message ID filter value, for comparison with the message ID field of
received frames. It defines the acceptable pattern value of the message ID to be received. These bits may
be written only in the configuration state.
3.2.3.8.6
Address 0x1E
Reset
136
FMDAFM15
FMDAFV15
FMDAFM7
FMDAFV7
rw*
rw*
rw*
rw*
15
15
7
7
0x0
0x0
FIFO Acceptance Filter Message ID Value Register (FAFMIDVR)
FIFO Acceptance Filter Message ID Mask Register (FAFMIDMR)
FMDAFM14
FMDAFV14
FMDAFM6
FMDAFV6
rw*
rw*
rw*
rw*
14
14
6
6
Figure 3-110. FIFO Acceptance Filter Message ID Value Register
Figure 3-111. FIFO Acceptance Filter Message ID Mask Register
FMDAFM13
FMDAFV13
FMDAFM5
FMDAFV5
rw*
rw*
rw*
rw*
13
13
5
5
Register” and
MFR4200 Data Sheet, Rev. 0
FMDAFM12
FMDAFV12
FMDAFM4
FMDAFV4
rw*
rw*
rw*
rw*
12
12
4
4
Section 3.4.2, “Message Buffer Filter
FMDAFM11
FMDAFV11
FMDAFM3
FMDAFV3
rw*
rw*
rw*
rw*
11
11
3
3
FMDAFM10
FMDAFV10
FMDAFM2
FMDAFV2
rw*
rw*
rw*
rw*
10
10
2
2
Section 3.4.1, “Message Buffer
FMDAFM9
FMDAFM1
FMDAFV9
FMDAFV1
Freescale Semiconductor
rw*
rw*
rw*
rw*
9
1
9
1
Registers”.
FMDAFM8
FMDAFM0
FMDAFV8
FMDAFV0
rw*
rw*
rw*
rw*
8
0
8
0