SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 104

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

Rev 0.2 (09-28-04)
REGISTER BIT
Interrupt Enable Register
Interrupt Identification Reg.
FIFO Control
Line Control Reg.
MODEM Control Reg.
Line Status Reg.
MODEM Status Reg.
INTRPT (RCVR errs)
INTRPT (RCVR Data Ready)
INTRPT (THRE)
RCVR FIFO
XMIT FIFO
PIN SIGNAL
TXDn
nRTSx
nDTRx
96M
24M
Reg 0xF0
Bit[1]
Mux
RESET CONTROL
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET/Read LSR
RESET/Read RBR
RESET/Read IIR/Write THR
RESET/
FCR1*FCR0/_FCR0
RESET/
FCR1*FCR0/_FCR0
RESET CONTROL
RESET
RESET
RESET
Figure 8.2 Baud Rate Selection
DIVIDE
DIVIDE
DIVIDE
BY 6.5
BY 12
BY 13
Table 8.5 register Reset
Table 8.6 Pin Reset
DATASHEET
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Reg 0xF0
88
Bit[0]
MIDI
Sel
Reg 0xF0
Bit[3:2]
Freq
Sel
RESET STATE
All bits low
Bit 0 is high; Bits 1 - 7 low
All bits low
All bits low
All bits low
All bits low except 5, 6 high
Bits 0 - 3 low; Bits 4 - 7 input
Low
Low
Low
All Bits Low
All Bits Low
RESET STATE
High-Z (
High-Z (
High-Z (
Note
Note
Note
8.3)
8.3)
8.3)
Programmed
Divisor
(16 bit)
User
SMSC SCH311X
Datasheet
Baud
Rate