SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 96

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

Rev 0.2 (09-28-04)
FIFO
MODE
ONLY
BIT 3
0
0
0
1
0
0
BIT 7
INTERRUPT
IDENTIFICATION
REGISTER
BIT 2
0
1
1
1
0
0
0
0
1
1
LINE CONTROL REGISTER (LCR)
Address Offset = 3H, DLAB = 0, READ/WRITE
BIT 1
0
1
0
0
1
0
BIT 0
1
0
0
0
0
0
BIT 6
0
1
0
1
INTERRUPT SET AND RESET FUNCTIONS
PRIORITY
LEVEL
-
Highest
Second
Second
Third
Fourth
Start LSB Data 5-8 bits MSB
Table 8.2 Interrupt Control
Figure 8.1 Serial Data
DATASHEET
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
INTERRUPT
TYPE
None
Receiver Line
Status
Received Data
Available
Character
Timeout
Indication
Transmitter
Holding
Register Empty
MODEM Status
80
Parity
Stop
TRIGGER LEVEL (BYTES)
INTERRUPT
SOURCE
None
Overrun Error,
Parity Error,
Framing Error or
Break Interrupt
Receiver Data
Available
No Characters
Have Been
Removed From or
Input to the RCVR
FIFO during the
last 4 Char times
and there is at
least 1 char in it
during this time
Transmitter
Holding Register
Empty
Clear to Send or
Data Set Ready or
Ring Indicator or
Data Carrier Detect
RCVR FIFO
14
1
4
8
INTERRUPT
RESET CONTROL
-
Reading the Line
Status Register
Read Receiver
Buffer or the FIFO
drops below the
trigger level.
Reading the
Receiver Buffer
Register
Reading the IIR
Register (if Source
of Interrupt) or
Writing the
Transmitter
Holding Register
Reading the
MODEM Status
Register
SMSC SCH311X
Datasheet