SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 349
![no-image](/images/no-image-200.jpg)
SCH3112I-NE
Manufacturer Part Number
SCH3112I-NE
Description
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.SCH3112I-NE.pdf
(396 pages)
- Current page: 349 of 396
- Download datasheet (6Mb)
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Datasheet
SMSC SCH311X
WDT_CFG
Default = 0x00
on VCC POR, VTR
POR, and PCI
Reset
WDT_CTRL
Default = 0x00
on VCC POR and
VTR POR
Default =
0000000xb on PCI
Reset
Note: Bit[0] is not
cleared by PCI
Reset
TEST
Default=0x00 on
Vbat POR
GP44
Default = 0x80
on VTR POR
SCH3112, SCH3114
ONLY
NAME
Table 26.3 Detailed Runtime Register Description (continued)
67
(R/W)
68
(R/W)
Bit[2] is
Write-Only
6D
(R/W)
6Eh
(R/W)
OFFSET
(HEX)
REG
Watch-dog timer Configuration
Bit[0] Reserved
Bit[1] Keyboard Enable
=1 WDT is reset upon a Keyboard interrupt.
=0 WDT is not affected by Keyboard interrupts.
Bit[2] Mouse Enable
=1 WDT is reset upon a Mouse interrupt.
=0 WDT is not affected by Mouse interrupts.
Bit[3] Reserved
Bits[7:4] WDT Interrupt Mapping
1111 = IRQ15
.........
0011 = IRQ3
0010 = IRQ2 (Note)
0001 = IRQ1
0000 = Disable
Note: IRQ2 is used for generating SMI events via the serial IRQ’s stream.
The WDT should not be configured for IRQ2 if the IRQ2 slot is enabled for
generating an SMI event.
Watch-dog timer Control
Bit[0] Watch-dog Status Bit, R/W
=1 WD timeout occurred
=0 WD timer counting
Bit[1] Reserved
Bit[2] Force Timeout, W
=1 Forces WD timeout event; this bit is self-clearing
Bit[3] P20 Force Timeout Enable, R/W
= 1 Allows rising edge of P20, from the Keyboard Controller, to force the
WD timeout event. A WD timeout event may still be forced by setting the
Force Timeout Bit, bit 2.
Note : If the P20 signal is high when the enable bit is set a WD timeout
event will be generated.
= 0 P20 activity does not generate the WD timeout event.
Note: The P20 signal will remain high for a minimum of 1us and can remain
high indefinitely. Therefore, when P20 forced timeouts are enabled, a self-
clearing edge-detect circuit is used to generate a signal which is OR’ed
with the signal generated by the Force Timeout Bit.
Bit[7:4] Reserved. Set to 0
Test Register.
Test Registers are reserved for SMSC. Users should not write to this
register, may produce undesired results.
General Purpose I/O bit 4.4
Bit[0] In/Out :
Bit[1] Polarity : =1 Invert, =0 No Invert
Bit[2] Alternate Function Select
1=GPIO
0=nIDE_RSTDRV (Default)
Bits[6:3] Reserved
Bit[7] Output Type Select
1=Open Drain
0=Push Pull
DATASHEET
=1 Input, =0 Output
333
DESCRIPTION
Rev 0.2 (09-28-04)
Related parts for SCH3112I-NE
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![SCH3116](/images/no-image3.png)
Part Number:
Description:
(SCH3112 - SCH3116) LPC IO
Manufacturer:
SMSC Corporation
Datasheet:
![LAN83C183-JD](/images/no-image3.png)
Part Number:
Description:
FAST ETHERNET PHYSICAL LAYER DEVICE
Manufacturer:
SMSC Corporation
Datasheet:
![FDC37N769TQFP](/images/no-image3.png)
Part Number:
Description:
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer:
SMSC Corporation
Datasheet:
![LPC47M102S-MC](/images/no-image3.png)
Part Number:
Description:
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer:
SMSC Corporation
Datasheet:
![LPC47N267-MN](/images/no-image3.png)
Part Number:
Description:
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer:
SMSC Corporation
Datasheet:
![USB20H04-JD](/images/no-image3.png)
Part Number:
Description:
4-PORT USB2.0 HUB CONTROLLER
Manufacturer:
SMSC Corporation
Datasheet:
![FDC37M602](/images/no-image3.png)
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet:
![FDC37B777](/images/no-image3.png)
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet:
![FDC37C672](/images/no-image3.png)
Part Number:
Description:
FDC37C672ENHANCED SUPER I/O CONTROLLER WITH FAST IR
Manufacturer:
SMSC Corporation
Datasheet:
![COM90C66LJP](/images/no-image3.png)
Part Number:
Description:
COM90C66LJPARCNET Controller/Transceiver with AT Interface and On-Chip RAM
Manufacturer:
SMSC Corporation
Datasheet:
![FDC37N869TQFP](/images/no-image3.png)
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet:
![USB97C100QFP](/images/no-image3.png)
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet:
![LPC47N227-MN](/images/no-image3.png)
Part Number:
Description:
Manufacturer:
SMSC Corporation
Datasheet: