SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 292

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

Rev 0.2 (09-28-04)
25.1.1
0xF0
Config Control
Default = 0x00
on VCC POR,
VTR POR and
PCI RESET
Logical Device #
Default = 0x00
on VCC POR,
VTR POR,
SOFT RESET and PCI
RESET
Reserved
INDEX
REGISTER
Note 25.2
Global Config Registers
The chip-level (global) registers lie in the address range [0x00-0x2F]. The design MUST use all 8 bits
of the ADDRESS Port for register selection. All unimplemented registers and bits ignore writes and
return zero when read.
The INDEX PORT is used to select a configuration register in the chip. The DATA PORT is then used
to access the selected register. These registers are accessible only in the Configuration Mode.
R/W
TYPE
LOGICAL DEVICE F CONFIGURATION REGISTERS (RESERVED)
Table 25.3 Configuration Register Summary (continued)
Table 25.4 Chip-Level (Global) Configuration Registers
Serial ports 1 and 2 may be placed in the powerdown mode by clearing the associated
activate bit located at CR30 or by clearing the associated power bit located in the Power
Control register at CR22. Serial ports 3,4,5,6 (if available) may be placed in the
powerdown mode by clearing the associated activate bit located at CR30. When in the
powerdown mode, the serial port outputs are tristated. In cases where the serial port is
multiplexed as an alternate function, the corresponding output will only be tristated if the
serial port is the selected alternate function.
0x00
RESET
PCI
0x08 - 0x18,
0x00 - 0x01
0x03 - 0x06
ADDRESS
0x1A-0x1F
0x07 R/W
0x02 W
CHIP (GLOBAL) CONTROL REGISTERS
0x00
VCC POR
CHIP-LEVEL, SMSC DEFINED
Reserved - Writes are ignored, reads return 0.
The hardware automatically clears this bit after the write, there is
no need for software to clear the bits.
Bit 0 = 1: Soft Reset. Refer to
Register Summary,” on page 272
register.
Reserved - Writes are ignored, reads return 0 .
A write to this register selects the current logical device. This
allows access to the control and configuration registers for each
logical device. Note: The Activate command operates only on the
selected logical device.
Reserved - Writes are ignored, reads return 0 .
DATASHEET
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
0x00
VTR POR
276
-
RESET
SOFT
DESCRIPTION
theTable 25.3, “Configuration
Serial Port 6 Mode Register
for the soft reset value for each
CONFIGURATION REGISTER
SMSC SCH311X
Datasheet