SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 201

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Datasheet
Chapter 22 Battery Backed Security Key Register
SMSC SCH311X
REGISTER OFFSET
Located at the Secondary Base I/O Address of Logical Device A is a 32 byte CMOS memory register
dedicated to security key storage. This security key register is battery powered and has the option to
be read protected, write protected, and lockable. The Secondary Base I/O Address is programmable
at offsets 0x62 and 0x63. See PME_STS1.
complete list of the Security Key registers.
(HEX)
0C
0D
0A
0B
0E
0F
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
Table 22.1 Security Key Register Summary
VBAT POR
DATASHEET
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
185
Table 22.1, "Security Key Register Summary"
Security Key Byte 10
Security Key Byte 11
Security Key Byte 12
Security Key Byte 13
Security Key Byte 14
Security Key Byte 15
Security Key Byte 16
Security Key Byte 17
Security Key Byte 18
Security Key Byte 19
Security Key Byte 20
Security Key Byte 21
Security Key Byte 22
Security Key Byte 23
Security Key Byte 24
Security Key Byte 25
Security Key Byte 0
Security Key Byte 1
Security Key Byte 2
Security Key Byte 3
Security Key Byte 4
Security Key Byte 5
Security Key Byte 6
Security Key Byte 7
Security Key Byte 8
Security Key Byte 9
REGISTER
Rev 0.2 (09-28-04)
is a