SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 330

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

Rev 0.2 (09-28-04)
Floppy Data Rate
Select Shadow
UART1 FIFO
Control Shadow
UART2 FIFO
Control Shadow
UART3 FIFO
Control Shadow
THIS REGISTER IS
RESERVED FOR
SCH3112 DEVICE
UART3 FIFO
Control Shadow
SCH3114 AND
SCH3116 DEVICE
ONLY.
GP10
Default = 0x01
SCH3112 DEVICE
ONLY
GP10
Default = 0x01
SCH3114,SCH3116
DEVICES ONLY
on VTR POR
on VTR POR
NAME
Table 26.3 Detailed Runtime Register Description (continued)
1F
(R)
20
(R)
21
(R)
22
(R)
22
(R)
23
(R/W)
23
(R/W)
OFFSET
(HEX)
REG
Floppy Data Rate Select Shadow
Bit[0] Data Rate Select 0
Bit[1] Data Rate Select 1
Bit[2] PRECOMP 0
Bit[3] PRECOMP 1
Bit[4] PRECOMP 2
Bit[5] Reserved
Bit[6] Power Down
Bit[7] Soft Reset
UART FIFO Control Shadow 1
Bit[0] FIFO Enable
Bit[1] RCVR FIFO Reset
Bit[2] XMIT FIFO Reset
Bit[3] DMA Mode Select
Bit[5:4] Reserved
Bit[6] RCVR Trigger (LSB)
Bit[7] RCVR Trigger (MSB)
UART FIFO Control Shadow 2
Bit[0] FIFO Enable
Bit[1] RCVR FIFO Reset
Bit[2] XMIT FIFO Reset
Bit[3] DMA Mode Select
Bit[5:4] Reserved
Bit[6] RCVR Trigger (LSB)
Bit[7] RCVR Trigger (MSB)
SCH3112 DEVICE
Bits[7:0] RESERVED
SCH3114 AND SCH3116 DEVICE
UART FIFO Control Shadow 3
Bit[0] FIFO Enable
Bit[1] RCVR FIFO Reset
Bit[2] XMIT FIFO Reset
Bit[3] DMA Mode Select
Bit[5:4] Reserved
Bit[6] RCVR Trigger (LSB)
Bit[7] RCVR Trigger (MSB)
General Purpose I/O bit 1.0
Bit[0] In/Out :
Bit[1] Polarity : =1 Invert, =0 No Invert
Bits[6:2] Reserved
Bit[7] Output Type Select
1=Open Drain
0=Push Pull
General Purpose I/O bit 1.0
Bit[0] In/Out :
Bit[1] Polarity : =1 Invert, =0 No Invert
Bit[2] Alternate Function Select
1= RXD3
0=GP10
Bits[6:3] Reserved
Bit[7] Output Type Select
1=Open Drain
0=Push Pull
DATASHEET
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
=1 Input, =0 Output
=1 Input, =0 Output
314
DESCRIPTION
SMSC SCH311X
Datasheet