SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 255

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SCH3112I-NE

Manufacturer Part Number
SCH3112I-NE
Description
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Manufacturer
SMSC [SMSC Corporation]
Datasheet
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Datasheet
SMSC SCH311X
24.2.13
Register
Address
BIT
0
1
2
3
4
5
6
7
44h
45h
46h
47h
48h
Diode 1 Fault
Diode 2 Fault
Slow/Stalled
Slow/Stalled
Slow/Stalled
FANTACH1
FANTACH2
FANTACH3
+12v_Error
Reserved
Reserved
Remote
Remote
NAME
Read/
Write
R/W
R/W
R/W
R/W
R/W
Notes:
Registers 44-4Dh, 9B-9Eh: Voltage Limit Registers
Clearing the status bits by clearing the individual enable bits.
Clearing or setting the individual enable bits does not take effect unless the START bit is 1. No
interrupt status events can be generated when START=0 or when the individual enable bit is
cleared. If the status bit is one and the START bit is one then clearing the individual enable bit will
immediately clear the status bit. If the status bit is one and the START bit is zero then clearing the
individual enable bit will have no effect on the status bit until the START bit is set to one. Setting
the START bit to one when the individual enable bit is zero will clear the status bit. Setting or
clearing the START bit when the individual enable bit is one has no effect on the status bits.
The individual enable bits for FANTACH[1:3] are located in
Register on page
Register 82h: Interrupt Enable 3 Register on page 255
Clearing the group FANTACH or Temp enable bits or the global INTEN enable bit has no effect on
the status bits.
R/WC
R/WC
R/WC
R/WC
R/WC
R/W
R
R
R
Register Name
Vccp High Limit
2.5V High Limit
Vccp Low Limit
2.5V Low Limit
VCC Low Limit
DEFAULT
254. The ERRx bits are enabled by the Remote Diode Limit error bits located in
0
0
0
0
0
0
0
0
The SCH311X automatically sets this bit to 1 when the 12V input voltage
is less than or equal to the limit set in the 12V Low Limit register or
greater than the limit set in the 12V High Limit register.
Reserved
The SCH311X automatically sets this bit to 1 when the FANTACH1 input
reading is above the value set in the Tach1 Minimum MSB and LSB
registers.
The SCH311X automatically sets this bit to 1 when the FANTACH2 input
reading is above the value set in the Tach2 Minimum MSB and LSB
registers.
The SCH311X automatically sets this bit to 1 when the FANTACH3 input
reading is above the value set in the Tach3 Minimum MSB and LSB
registers.
Reserved
The SCH311X automatically sets this bit to 1 when there is either a short
or open circuit fault on the Remote1+ or Remote1- thermal diode input
pins as defined in the sectionPME_STS1.
If the START bit is set and a fault condition exists, the Remote Diode 1
reading register will be forced to 80h.
The SCH311X automatically sets this bit to 1 when there is either a short
or open circuit fault on the Remote2+ or Remote2- thermal diode input
pins as defined in the sectionPME_STS1.
If the START bit is set and a fault condition exists, the Remote Diode 2
reading register will be forced to 80h.
DATASHEET
(MSb)
Bit 7
7
7
7
7
7
239
Bit 6
6
6
6
6
6
Bit 5
5
5
5
5
5
DESCRIPTION
Bit 4
4
4
4
4
4
Register 80h: Interrupt Enable 2
Bit 3
3
3
3
3
3
Bit 2
2
2
2
2
2
Bit 1
1
1
1
1
1
Rev 0.2 (09-28-04)
(LSb)
Bit 0
0
0
0
0
0
Default
Value
FFh
FFh
00h
00h
00h

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