MT41J64M16JT-15E AIT:G Micron, MT41J64M16JT-15E AIT:G Datasheet - Page 132

• Manufacturer Part Number: MT41J64M16JT-15E AIT:G
• Description: DRAM Chip DDR3 SDRAM 1G-Bit 64Mx16 1.5V 96-Pin FBGA
• Manufacturer: Micron

SELF REFRESH TEMPERATURE (SRT)
SRT vs. ASR
DYNAMIC ODT
PDF: 09005aef84491df3
1Gb_AIT_AAT_DDR3_SDRAM.pdf – Rev. C 8/11 EN
sure the DRAM never exceeds a T
the SRT feature listed below when the T
Enabling ASR assumes the DRAM self refresh rate is changed automatically from 1x to
2x when the case temperature exceeds 85°C. This enables the user to operate the DRAM
beyond the standard 85°C limit up to the optional extended temperature range of 95°C
while in self refresh mode.
The standard self refresh current test specifies test conditions to normal case tempera-
ture (85°C) only, meaning if ASR is enabled, the standard self refresh current specifica-
tions do not apply (see Extended Temperature Usage (page 168)).
Mode register MR2[7] is used to disable/enable the SRT function. When SRT is disabled,
the self refresh mode’s refresh rate is assumed to be at the normal 85°C limit (some-
times referred to as 1x refresh rate). In the disabled mode, SRT requires the user to en-
sure the DRAM never exceeds a T
ables ASR.
When SRT is enabled, the DRAM self refresh is changed internally from 1x to 2x, regard-
less of the case temperature. This enables the user to operate the DRAM beyond the
standard 85°C limit up to the optional extended temperature range of 95°C while in self
refresh mode. The standard self refresh current test specifies test conditions to normal
case temperature (85°C) only, meaning if SRT is enabled, the standard self refresh cur-
rent specifications do not apply (see Extended Temperature Usage (page 168)).
If the normal case temperature limit of 85°C is not exceeded, then neither SRT nor ASR
is required, and both can be disabled throughout operation. However, if the extended
temperature option of 95°C is needed, the user is required to provide a 2x refresh rate
during (manual) refresh and to enable either the SRT or the ASR to ensure self refresh is
performed at the 2x rate.
SRT forces the DRAM to switch the internal self refresh rate from 1x to 2x. Self refresh is
performed at the 2x refresh rate regardless of the case temperature.
ASR automatically switches the DRAM’s internal self refresh rate from 1x to 2x. Howev-
er, while in self refresh mode, ASR enables the refresh rate to automatically adjust be-
tween 1x to 2x over the supported temperature range. One other disadvantage with ASR
is the DRAM cannot always switch from a 1x to a 2x refresh rate at an exact case temper-
ature of 85°C. Although the DRAM will support data integrity when it switches from a 1x
to a 2x refresh rate, it may switch at a lower temperature than 85°C.
Since only one mode is necessary, SRT and ASR cannot be enabled at the same time.
The dynamic ODT (R
when a value is selected. This new DDR3 SDRAM feature enables the ODT termination
value to change without issuing an MRS command, essentially changing the ODT ter-
mination on-the-fly.
With dynamic ODT (R
to dynamic ODT (R
TT(WR)
TT(WR)
TT(WR)
) when beginning a WRITE burst and subsequently switches
) feature is defined by MR2[10, 9]. Dynamic ODT is enabled
) enabled, the DRAM switches from normal ODT (R
132
C
C
1Gb: x8, x16 Automotive DDR3 SDRAM
of 85°C while in self refresh mode unless the user en-
of 85°C while in self refresh unless the user enables
Micron Technology, Inc. reserves the right to change products or specifications without notice.
C
is between 85°C and 95°C.
Mode Register 2 (MR2)
‹ 2010 Micron Technology, Inc. All rights reserved.
TT,nom
)