MT41J64M16JT-15E AIT:G Micron, MT41J64M16JT-15E AIT:G Datasheet - Page 27
MT41J64M16JT-15E AIT:G
Manufacturer Part Number
MT41J64M16JT-15E AIT:G
Description
DRAM Chip DDR3 SDRAM 1G-Bit 64Mx16 1.5V 96-Pin FBGA
Manufacturer
Micron
Datasheet
1.MT41J64M16JT-15EAITG.pdf
(200 pages)
- Current page: 27 of 200
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Table 8: I
PDF: 09005aef84491df3
1Gb_AIT_AAT_DDR3_SDRAM.pdf – Rev. C 8/11 EN
DD1
0
1
2
3
4
5
6
7
Measurement Loop
nRC + nRCD
nRC + nRAS
10 × nRC
12 × nRC
14 × nRC
nRC + 1
nRC + 2
nRC + 3
nRC + 4
2 × nRC
4 × nRC
6 × nRC
8 × nRC
nRCD
nRAS
nRC
Notes:
0
1
2
3
4
1. DQ, DQS, DQS# are midlevel unless driven as required by the RD command.
2. DM is LOW.
3. Burst sequence is driven on each DQ signal by the RD command.
4. Only selected bank (single) active.
Electrical Specifications – I
ACT
ACT
PRE
PRE
D#
D#
RD
D#
D#
RD
Repeat cycles nRC + 1 through nRC + 4 until nRC + nRCD - 1; truncate if needed
Repeat cycles nRC + 1 through nRC + 4 until nRC + nRAS - 1; truncate if needed
D
D
D
D
Repeat cycle nRC + 1 through nRC + 4 until 2 × nRC - 1; truncate if needed
Repeat cycles 1 through 4 until nRCD - 1; truncate if needed
Repeat cycles 1 through 4 until nRAS - 1; truncate if needed
0
1
1
1
1
0
0
Repeat cycles 1 through 4 until nRC - 1; truncate if needed
0
1
1
1
1
0
0
0
0
0
1
1
1
0
0
0
0
1
1
1
0
1
0
0
1
1
0
1
1
0
0
1
1
0
1
Repeat sub-loop 0, use BA[2:0] = 1
Repeat sub-loop 0, use BA[2:0] = 2
Repeat sub-loop 0, use BA[2:0] = 3
Repeat sub-loop 0, use BA[2:0] = 4
Repeat sub-loop 0, use BA[2:0] = 5
Repeat sub-loop 0, use BA[2:0] = 6
Repeat sub-loop 0, use BA[2:0] = 7
27
1
0
0
1
1
1
0
1
0
0
1
1
1
0
1Gb: x8, x16 Automotive DDR3 SDRAM
Micron Technology, Inc. reserves the right to change products or specifications without notice.
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DD
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Specifications and Conditions
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2010 Micron Technology, Inc. All rights reserved.
0
0
0
0
0
0
0
F
F
F
F
F
F
F
0
0
0
0
0
0
0
0
0
0
0
0
0
0
00000000
00110011
–
–
–
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