PNX1500E/G,557 NXP Semiconductors, PNX1500E/G,557 Datasheet - Page 475

• Manufacturer Part Number: PNX1500E/G,557
• Description: IC MEDIA PROC 240MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.14 V ~ 1.26 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1296; 935277746557; PNX1500E/G

Philips Semiconductors
Volume 1 of 1
PNX15XX_SER_3
Product data sheet
3.4.1 Record Synchronization Events
3.4.2 Buffer Synchronization Events
Starting output of sample data for each record is signaled by a output start event
(selected by the FGPO_CTL.REC_SYNC bits):
The record ends by reaching the programmed record size in the FGPO_REC_SIZE
register or by the next record start event, whichever comes first.
It takes 4 FGPO clock cycles to synchronize and react to events on the
fgpo_rec_sync pin in external record sync mode. If timestamps are enabled the
output is started on the next FGPO clock tick after the timestamp event.
Each buffer is started by a buffer start event. (selected by the
FGPO_CTL.BUF_SYNC bits):
The fgpo_buf_sync signal will only be observed after the current buffer is finished. It
takes 4 FGPO clock cycles to synchronize and react to events on the fgpo_buf_sync
pin in external buffer sync mode.
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a rising edge on fgpo_rec_sync pin
a falling edge on fgpo_rec_sync pin
wait FGPO_REC_GAP clock cycles before starting next record, start first record
immediately
wait for timestamp event
occur immediately after the previous buffer is sent or when output is enabled
a rising edge on fgpo_buf_sync pin
a falling edge on fgpo_buf_sync pin
alternating rising and falling edges on fgpo_buf_sync pin, starting with the next
rising edge on fgpo_buf_sync pin
alternating rising and falling edges on fgpo_buf_sync pin, starting with the next
falling edge on fgpo_buf_sync pin
wait FGPO_BUF_SYNC clock cycles before starting next buffer, start first buffer
immediately
occur immediately after the previous buffer is sent or when output is started
Rev. 3 — 17 March 2006
Chapter 13: FGPO: Fast General Purpose Output
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX15xx Series
13-14