PNX1500E/G,557 NXP Semiconductors, PNX1500E/G,557 Datasheet - Page 555

• Manufacturer Part Number: PNX1500E/G,557
• Description: IC MEDIA PROC 240MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.14 V ~ 1.26 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1296; 935277746557; PNX1500E/G

Philips Semiconductors
Volume 1 of 1
Table 6: SPDO Registers
PNX15XX_SER_3
Product data sheet
Bit
29:27
26:8
7
6
5
4
3
2
1
0
Offset 0x10 9008
31:0
Offset 0x10 900C
31:6
5:0
Offset 0x10 9010
31:6
5:0
Offset 0x10 9014
Symbol
TRANS_MODE
Reserved
UDR_INTEN
HBE_INTEN
BUF2_INTEN
BUF1_INTEN
ACK_UDR
ACK_HBE
ACK_BUF2
ACK_BUF1
Reserved
SPDO_BASE1
Reserved
SPDO_BASE2
Reserved
…Continued
Reserved
SPDO_BASE1
SPDO_BASE2
SPDO_SIZE
Acces
s
R/W
R/W
R/W
R/W
R/W
W
W
W
W
-
0x0
-
0x0-
-
000
-
0
0
0
0
0
0
0
0
R/W
R/W
R
R/W
R
Value
Rev. 3 — 17 March 2006
Description
Transmission mode.
Note: The transmission mode should only be changed while
transmission is disabled.
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
If UDR_INTEN = 1 and UNDERRUN = 1, an interrupt is asserted to
the chip level interrupt controller.
If HBE_INTEN = 1 and HBE = 1, an interrupt is asserted to the chip
level interrupt controller.
If BUF2_INTEN = 1 and BUF2_EMPTY = 1, an interrupt is asserted
to the chip level interrupt controller.
If BUF1_INTEN = 1 and BUF1_EMPTY = 1, an interrupt is asserted
to the chip level interrupt controller.
1= Clear UNDERRUN.
0=No effect. Always reads as 0.
1= Clear HBE.
0= No effect.Always reads as 0.
1= Clear BUF2_EMPTY. Informs SPDO that DMA buffer 2 is full.
0= No effect. Always reads as ‘0’.
SPDO_BASE2 is then used to fetch buffer1 data from memory.
1= Clear BUF1_EMPTY. Informs SPDO that DMA buffer 1 is
0= No effect. Always reads as 0.
SPDO_BASE1 is then used to fetch buffer1 data from memory.
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
Contains the memory address of DMA buffer 1.
If changed it must be set before ACK_BUF1.
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
Contains the memory address of DMA buffer 2.
If changed it must be set before ACK_BUF2.
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
000 =IEC-60958 mode. Hardware performs bi-phase mark
encoding, preamble and parity generation, and transmits one
IEC-60958 subframe for each data descriptor word.
010 =Transparent mode, LSB first. The 32 bit data descriptor
words are transmitted as is, LSB first.
011 =Transparent mode, MSB first. The 32 bit data descriptor
words are transmitted as is, MSB first.
Other codes are reserved for future extensions.
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Chapter 17: SPDIF Output
PNX15xx Series
17-10