PNX1500E/G,557 NXP Semiconductors, PNX1500E/G,557 Datasheet - Page 774

• Manufacturer Part Number: PNX1500E/G,557
• Description: IC MEDIA PROC 240MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.14 V ~ 1.26 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1296; 935277746557; PNX1500E/G

Philips Semiconductors
Volume 1 of 1
Table 7: IIC Registers
PNX15XX_SER_3
Product data sheet
Bit
Offset 0x04 5010
31:1
0
Offset 0x04 5014
31:3
2
1:0
Offset 0x04 5018
31:2
1
0
Offset 0x04 501C
31:2
1
0
Offset 0x04 5020—9FDC Reserved
Acces
s
R/W
R/W
W
W
R
R
Value
-
0
-
0
-
-
0
0
-
0
0
I2C STOP REGISTER
I2C PD REGISTER
I2C BUS SET REGISTER
I2C BUS OBSERVATION REGISTER
Symbol
Unused
STO
Unused
PD
Unused
Unused
SET_SCL_LOW
SET_SDA_LOW
Unused
OBSERVE_SCL
OBSERVE_SDA
Rev. 3 — 17 March 2006
Description
Ignore upon read. Write as zeroes.
Set and read STO flag
Writes:
In master mode, set STO flag to indicate a STOP has been
requested. Then generate a STOP condition on I
STOP condition is detected on the bus, the IIC module hardware
clears the STO flag.
In slave mode, set STO flag to indicate a STOP has been
requested. No STOP condition is transmitted to the I
However, the IIC module hardware behaves as if a STOP condition
has been received and switches to the defined “not addressed”
slave receiver mode. The STO flag is immediately cleared by the
hardware so that software can never see it set.
Reads:
View the STO flag to see if a STOP has been requested. STO flag
can also be viewed by reading the STO bit of IIC_CONTROL.
See STO bit of IIC_CONTROL register for more information
Ignore upon read. Write as zeroes.
This bit synchronously resets the IIC clock domain except for the
MMIO registers.
Note: Do not reset the IIC clock domain until the IIC module is
disabled using bit 6 of the IIC Control register.
Ignore upon read. Write as zeroes.
Ignore upon read. Write as zeroes.
Pull I2C SCL bus signal to logic one or zero:
Pull I2C SDA bus signal to logic one or zero:
Ignore upon read. Write as zeroes.
Observe I2C SCL bus signal:
Observe I2C SDA bus signal
0 = Don’t reset IIC clock domain.
1 = Reset IIC clock domain.
1 = Pulls SCL signal to logic zero.
0 = SCL signal is not pulled to logic zero.
1 = Pulls SDA signal to logic zero.
0 = SDA signal is not pulled to logic zero.
1 = SCL signal is at logic one.
0 = SCL signal is at logic zero.
1 = SDA signal is at logic one.
0 = SDA signal is at logic zero.
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX15xx Series
Chapter 25: I
2
C bus. When the
2
C bus.
2
C Interface
25-17