Z8018010PSG Zilog, Z8018010PSG Datasheet - Page 108
Z8018010PSG
Manufacturer Part Number
Z8018010PSG
Description
IC 10MHZ Z180 CMOS ENH MPU 64DIP
Manufacturer
Zilog
Specifications of Z8018010PSG
Processor Type
Z180
Features
8-Bit, Enhanced Z80 Megacell
Speed
10MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
64-DIP (0.750", 19.05mm)
Processor Series
Z8018xx
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
10 MHz
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
Core Size
8bit
Cpu Speed
10MHz
Digital Ic Case Style
DIP
No. Of Pins
64
Supply Voltage Range
4.5V To 5.5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
8018010
Rohs Compliant
Yes
Clock Frequency
10MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3889
Z8018010PSG
Z8018010PSG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8018010PSG
Manufacturer:
Zilog
Quantity:
40
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DMA Destination Address
Register ch0 : DAR0 (20)
DMA Destination Address
Register ch1 : MAR1 (20)
DMA I/O Address
Register ch1 : IAR1 (16)
Register ch0 : SAR0 (20)
DMA Byte Count
Register ch0 : BCR0 (16)
DMA Byte Count
Register ch1 : BCR1 (16)
DMA Source Address
Figure 45.
DMAC Register Description
DMA Source Address Register Channel 0 (SAR0 I/O Address = 20H
to 22H)
Specifies the physical source address for channel 0 transfers. The register
contains 20 bits and can specify up to 1024KB memory addresses or up to
64KB I/O addresses. Channel 0 source can be memory, I/O, or memory
mapped I/O.
Incrementer/Decrementer (16)
DMAC Block Diagram
Internal Address/Data Bus
DMA Mode
Register : DMODE (8)
DMA Status
Register : DSTAT (8)
DMA/WAIT Control
Register : DCNTL (8)
DMA Control
Interrupt Request
TEND0
TEND1
Family MPU User Manual
Bus & CPU
Control
Priority &
Request
Control
UM005003-0703
DREQ0
DREQ1
Z8018x
93
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