Z8018010PSG Zilog, Z8018010PSG Datasheet - Page 264

• Manufacturer Part Number: Z8018010PSG
• Description: IC 10MHZ Z180 CMOS ENH MPU 64DIP
• Manufacturer: Zilog

Specifications of Z8018010PSG

• Processor Type: Z180
• Features: 8-Bit, Enhanced Z80 Megacell
• Speed: 10MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 64-DIP (0.750", 19.05mm)
• Processor Series: Z8018xx
• Core: Z80
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 10 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Core Size: 8bit
• Cpu Speed: 10MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 64
• Supply Voltage Range: 4.5V To 5.5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 8018010
• Rohs Compliant: Yes
• Clock Frequency: 10MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3889; Z8018010PSG

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UM005003-0703
Z8018x
Family MPU User Manual
Note 1: (HL) replaces g.
Note 2: (HL) replaces s.
Note 3: If DDH is supplemented as first Op Code for the instructions
which have HL or (HL) as an operand in Table 48, the instructions are
executed replacing HL with IX and (HL) with (IX+d).
ex. 22H : LD (mn), HL
DDH 22H : LD (mn), IX
If FDH is supplemented as 1st Op Code for the instructions which have
HL or (HL) as an operand in Table 48, the instructions are executed
replacing HL with IY and (HL) with (IY+d).
ex. 34H : INC (HL)
FDH 34H : INC (IY+d)
However, JP (HL) and EX DE, HL are exceptions and note the following.
•
•
•
If DDH is supplemented as 1st Op Code for JP (HL), (IX) replaces
(HL) as operand and JP (IX) is executed
If FDH is supplemented as 1st Op Code for JP (HL), (IY) replaces
(HL) as operand and JP (IY) is executed
Even if DDH or FDH is supplemented as 1st Op Code for EX DE,
HL, HL is not replaced and the instruction is regarded as illegal
instruction.